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LTC3703-5

18

37035fa

node dV/dt can be many volts/ns, which will pull up on the
gate of the bottom MOSFET through its Miller capacitance.
If this Miller current, times the internal gate resistance of
the MOSFET plus the driver resistance, exceeds the thresh-
old of the FET, shoot-through will occur. By using a nega-
tive supply on BGRTN, the BG can be pulled below ground
when turning the bottom MOSFET off. This provides a few
extra volts of margin before the gate reaches the turn-on
threshold of the MOSFET. Be aware that the maximum
voltage difference between DRV

CC

 and BGRTN is 15V. If,

for example, V

BGRTN

 = –2V, the maximum voltage on

DRV

CC

 pin is now 13V instead of 15V.

Current Limit Programming

Programming current limit on the LTC3703-5 is straight
forward. The I

MAX

 pin sets the current limit by setting the

maximum allowable voltage drop across the bottom
MOSFET. The voltage across the MOSFET is set by its on-
resistance and the current flowing in the inductor, which
is the same as the output current. The LTC3703-5 current
limit circuit inverts the negative voltage across the MOSFET
before comparing it to the voltage at I

MAX

, allowing the

current limit to be set with a positive voltage.

To set the current limit, calculate the expected voltage
drop across the bottom MOSFET at the maximum desired
current and maximum junction temperature:

V

PROG

 = (I

LIMIT

)(R

DS(ON)

)(1 + 

δ

)

where 

δ

 is explained in the MOSFET Selection section.

V

PROG

 is then programmed at the I

MAX

 pin using the

internal 12

µ

A pull-up and an external resistor:

R

IMAX

 = V

PROG

/12

µ

A

The current limit value should be checked to ensure that
I

LIMIT(MIN)

 > I

OUT(MAX)

. The minimum value of current limit

generally occurs with the largest V

IN

 at the highest ambi-

ent temperature, conditions that cause the largest power
loss in the converter. Note that it is important to check for
self-consistency between the assumed MOSFET junction
temperature and the resulting value of I

LIMIT

 which heats

the MOSFET switches.

Caution should be used when setting the current limit
based upon the R

DS(ON)

 of the MOSFETs. The maximum

current limit is determined by the minimum MOSFET on-

resistance. Data sheets typically specify nominal and
maximum values for R

DS(ON)

, but not a minimum. A

reasonable assumption is that the minimum R

DS(ON)

 lies

the same amount below the typical value as the maximum
lies above it. Consult the MOSFET manufacturer for further
guidelines.

For best results, use a V

PROG

 voltage between 100mV and

500mV. Values outside of this range may give less accu-
rate current limit. The current limit can also be disabled by
floating the I

MAX

 pin.

FEEDBACK LOOP/COMPENSATION

Feedback Loop Types

In a typical LTC3703-5 circuit, the feedback loop consists
of the modulator, the external inductor, the output capaci-
tor and the feedback amplifier with its compensation
network. All of these components affect loop behavior and
must be accounted for in the loop compensation. The
modulator consists of the internal PWM generator, the
output MOSFET drivers and the external MOSFETs them-
selves. From a feedback loop point of view, it looks like a
linear voltage transfer function from COMP to SW and has
a gain roughly equal to the input voltage. It has fairly
benign AC behavior at typical loop compensation frequen-
cies with significant phase shift appearing at half the
switching frequency.

The external inductor/output capacitor combination makes
a more significant contribution to loop behavior. These
components cause a second order LC roll off at the output,
with the attendant 180

°

 phase shift. This rolloff is what filters

the PWM waveform, resulting in the desired DC output
voltage, but the phase shift complicates the loop compen-
sation if the gain is still higher than unity at the pole fre-
quency. Eventually (usually well above the LC pole
frequency), the reactance of the output capacitor will ap-
proach its ESR and the rolloff due to the capacitor will stop,
leaving 6dB/octave and 90

°

 of phase shift (Figure 10).

So far, the AC response of the loop is pretty well out of the
user’s control. The modulator is a fundamental piece of the
LTC3703-5 design and the external L and C are usually
chosen based on the regulation and load current require-
ments without considering the AC loop response. The

APPLICATIO  S I  FOR   ATIO

W

U

U

U

Summary of Contents for LTC3703

Page 1: ... current applications The operating frequency is user program mable from 100kHz to 600kHz and can also be synchro nized to an external clock for noise sensitive applications Current limit is programmable with an external resistor and utilizes the voltage drop across the synchronous MOSFETtoeliminatetheneedforacurrentsenseresistor For applications requiring up to 100V operation refer to the LTC3703...

Page 2: ... 360 500 µA RUN SS 0V 0 5 µA MODE SYNC INV Voltages 0 3V to 15V fSET FB IMAX COMP Voltages 0 3V to 3V Driver Outputs TG SW 0 3V to BOOST 0 3V BG BGRTN 0 3V to DRVCC 0 3V Peak Output Current 10µs BG TG 5A Operating Temperature Range Note 2 LTC3703E 5 40 C to 85 C LTC3703I 5 40 C to 125 C Junction Temperature Notes 3 7 125 C Storage Temperature Range 65 C to 150 C Lead Temperature Soldering 10 sec 3...

Page 3: ... operating junction temperature may impair device reliability Note 8 RDS ON guaranteed by correlation to wafer level measurement SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loop VFB Feedback Voltage Note 4 0 792 0 800 0 808 V 0 788 0 812 V VFB LINE Feedback Voltage Line Regulation 5V VCC 15V Note 4 0 007 0 05 V VFB LOAD Feedback Voltage Load Regulation 1V VCOMP 2V Note 4 0 01 0 1 VM...

Page 4: ... EFFICIENCY 100 95 90 85 80 1 2 3 4 37035 G02 5 VCC VOLTAGE V 0 3 5 3 0 2 5 2 0 1 5 1 0 0 5 0 7 5 37035 G04 2 5 5 10 12 5 15 V CC CURRENT mA 37035 G05 37035 G03 V CC CURRENT µA 37035 G07 35 30 25 20 15 10 5 0 REFERENCE VOLTAGE V 0 803 0 802 0 801 0 800 0 799 0 798 37035 G08 VOUT 12V f 250kHz PULSE SKIP ENABLED VIN 42V VIN 24V VOUT 50mV DIV AC COUPLED IOUT 2A DIV VIN 50V VOUT 12V 1A TO 5A LOAD STEP...

Page 5: ...4 3 2 1 0 60 20 20 40 40 0 60 80 100 120 140 2 1 8 1 6 1 4 1 2 1 0 8 0 6 0 4 DRVCC BOOST VOLTAGE V 2 5 1 1 1 2 1 3 12 5 37035 G13 1 0 0 9 5 7 5 10 15 0 8 0 7 0 6 R DS ON Ω GATE CAPACITANCE nF 0 RISE FALL TIME ns 100 150 20 37035 G14 50 0 5 10 15 200 RISE TIME FALL TIME VCC 5V VCC VOLTAGE V 0 0 RUN SS PULL UP CURRENT µA 1 2 3 4 5 2 5 5 7 5 10 37035 G16 12 5 15 VCC 5V VCC 5V TYPICAL PERFOR A CE CHAR...

Page 6: ... MAX DUTY CYCLE 37035 G21 100 95 90 85 80 75 70 0 200 400 500 100 300 600 700 TEMPERATURE C SHUTDOWN THRESHOLD V 1 4 1 2 1 0 0 8 0 6 0 4 0 2 0 37035 G22 37035 G23 t ON MIN ns 200 180 160 140 120 100 80 60 40 60 40 20 0 20 40 60 80 100 120 140 TEMPERATURE C 60 40 20 0 20 40 60 80 100 120 140 60 40 20 0 20 40 60 80 100 120 140 TEMPERATURE C 25 C 45 C 90 C 125 C COMP V 0 5 DUTY CYCLE 100 80 60 40 20 ...

Page 7: ... the turn on time and rate of rise of the output voltage at power up An internal 4µA current source pull upattheRUN SSpinsetstheturn ontimeatapproximately 750ms µF GND Pin 8 Pin 14 Ground Pin BGRTN Pin 9 Pin 15 Bottom Gate Return This pin con nects to the source of the pull down MOSFET in the BG driver and is normally connected to ground Connecting a negative supply to this pin allows the synchron...

Page 8: ...t frequency voltage mode controller for DC DC step down converters It is designed to be used in a synchronous switching architecture with two external N channel MOSFETs Its high operating volt agecapabilityallowsittodirectlystepdowninputvoltages up to 60V without the need for a step down transformer For circuit operation please refer to the Functional Diagram of the IC and the circuit on the first...

Page 9: ...ward correction scheme With this circuit the duty cycle is adjusted instantaneously to changes in input voltage thereby avoiding unaccept able overshoot or undershoot It has the added advantage of making the DC loop gain independent of input voltage Figure 1 shows how large transient steps at the input have little effect on the output voltage 20µs DIV VOUT 50mV DIV AC COUPLED VOUT 12V ILOAD 1A 25V...

Page 10: ...ck to a frequency in the 100kHz to 600kHz range When locked to an external clock Pulse Skip Mode operation is automati callydisabled Constantfrequencyoperationbringswithit anumberofbenefits Inductorandcapacitorvaluescanbe chosenforapreciseoperatingfrequencyandthefeedback loop can be similarly tightly specified Noise generated by the circuit will always be at known frequencies Subharmonic oscillati...

Page 11: ...ent reverses to minimize the efficiency loss due to reverse current flow As the load is decreased see Fig ure 5 the duty cycle is reduced to maintain regulation until its minimum on time 200ns is reached When the load decreases below this point the LTC3703 5 begins to Figure 4 Efficiency in Pulse Skip Forced Continuous Modes LOAD mA 10 EFFICIENCY 100 90 80 70 60 50 40 30 20 10 0 100 1000 10000 370...

Page 12: ...e sirable to keep the switching noise out of a sensitive frequency band The LTC3703 5 uses a constant frequency architecture that can be programmed over a 100kHz to 600kHz range withasingleresistorfromthefSET pintoground asshown in the circuit on the first page of this data sheet The nominalvoltageonthefSET pinis1 2V andthecurrentthat flows from this pin is used to charge and discharge an internal...

Page 13: ...be used for the top MOSFET in applications that have an output voltage that is less than 1 3oftheinputvoltage InapplicationswhereVIN VOUT the top MOSFETs on resistance is normally less impor tant for overall efficiency than its input capacitance at operating frequencies above 300kHz MOSFET manufac turershavedesignedspecialpurposedevicesthatprovide reasonably low on resistance with significantly re...

Page 14: ... and COS are specified sometimes but definitions of these parameters are not included When the controller is operating in continuous mode the duty cycles for the top and bottom MOSFETs are given by APPLICATIO S I FOR ATIO W U U U MainSwitchDutyCycle V V SynchronousSwitchDutyCycle V V V OUT IN IN OUT IN The power dissipation for the main and synchronous MOSFETs at maximum output current are given b...

Page 15: ...rallel to meet size or height requirements in the design Because tantalum and OS CON capacitors are not avail able in voltages above 30V ceramics or aluminum electrolytics must be used for regulators with input sup pliesabove30V Ceramiccapacitorshavetheadvantageof very low ESR and can handle high RMS current but ceramicswithhighvoltageratings 50V arenotavailable with more than a few microfarads of...

Page 16: ...ivers are supplied from the DRVCC and BOOST pins see Figure 2 which have an absolute maximum voltage of 15V If the main supply voltage VIN is higher than 15V a separate supply with a voltage between 5V and 15V must be used to power the drivers If a separate supply is not available one can easily be generated from the main supply using one of the circuits shown in Figure 9 If the output voltage is ...

Page 17: ...l undervoltage lockout UVLO monitors the voltage on DRVCC to ensure that the LTC3703 5 has sufficient gate drive voltage If the DRVCC voltage falls VCC DRVCC FCB GND VIN TG1 SW BG1 BGRTN LTC3703 5 VOUT VSEC COUT 1µF 3703 F09c R1 VIN T1 OPTIONAL VCC CONNECTION 5V VSEC 15V R2 CIN R1 Q1 N 1 D1 5 1V VCC DRVCC VIN TG SW BG BGRTN LTC3703 5 VOUT COUT 3703 F09d CIN VIN 40V L1 1µF Q1 R1 BAT85 BAT85 BAT85 V...

Page 18: ...ased upon the RDS ON of the MOSFETs The maximum current limit is determined by the minimum MOSFET on resistance Data sheets typically specify nominal and maximum values for RDS ON but not a minimum A reasonable assumption is that the minimum RDS ON lies the same amount below the typical value as the maximum liesaboveit ConsulttheMOSFETmanufacturerforfurther guidelines For best results use a VPROG ...

Page 19: ... GAIN PHASE DEG FREQ 90 180 270 360 Figure 10 Transfer Function of Buck Modulator GAIN dB 37035 F11 0 PHASE 6dB OCT GAIN PHASE DEG FREQ 90 180 270 360 RB R1 FB C1 IN OUT VREF Figure 11 Type 1 Schematic and Transfer Function GAIN dB 37035 F12 0 PHASE 6dB OCT 6dB OCT GAIN PHASE DEG FREQ 90 180 270 360 RB VREF R1 R2 FB C2 IN OUT C1 Figure 12 Type 2 Schematic and Transfer Function GAIN dB 37035 F13 0 ...

Page 20: ...th the COMP and VOUT APPLICATIO S I FOR ATIO W U U U nodes don t corrupt the measurements or damage the analyzer If breadboard measurement is not practical a SPICE simulation can be used to generate approximate gain phase curves Plug the expected capacitor inductor and MOSFET values into the following SPICE deck and gener ate an AC plot of V VOUT V COMP in dB and phase of VOUT in degrees Refer to ...

Page 21: ...ld be tied to the VCC voltage or a voltage above 2V Note that in boost mode pulse skipoperationandthelinefeedforwardcom pensation are disabled For a boost converter the duty cycle of the main switch is D V V V OUT IN OUT For high VOUT to VIN ratios the maximum VOUT is limited bytheLTC3703 5 smaximumdutycyclewhichistypically 93 The maximum output voltage is therefore V V D V OUT MAX IN MIN MAX IN M...

Page 22: ...ANCE BOARD CAP VESR VCOUT VOUT AC asinglecapacitortype However atoutputvoltagesabove 30V where capacitors with both low ESR and high bulk capacitance are hard to find the best approach is to use a combination of aluminum and ceramic capacitors see discussion in Input Capacitor section for the buck con verter With this combination the ripple voltage can be improved significantly The low ESR ceremic...

Page 23: ...evable in buck converter A typical gain phase plot of a voltage mode boost con verter is shown in Figure 16 The modulator gain and phase can be measured as described for a buck converter or can be estimated as follows GAIN COMP to VOUT DC gain 20Log VOUT 2 VIN Dominant Pole fP V V LC IN OUT 1 2π Since significant phase shift begins at frequencies above the dominant LC pole choose a crossover frequ...

Page 24: ... Reversal Enabled DC Voltage 0 87V Pulse Skip Mode Operation No Current Reversal Feedback Resistors Regulating a Secondary Winding Ext Clock 0V to 2V Forced Continuous No Current Reversal the RUN SS pin allows an internal 4µA current source to charge up the soft start capacitor CSS When the voltage on RUN SS reaches 1V the LTC3703 5 begins operating at its minimum on time As the RUN SS voltage inc...

Page 25: ...ution however the 0 013 minimum spacebetweenpinsmaynotprovidesufficient APPLICATIO S I FOR ATIO W U U U PC board trace clearance between high and low voltage pins in higher voltage applications Where clearance is an issue the G28 package should be used The G28 package has 4 unconnected pins between the all adjacent high voltage and low voltage pins providing 5 0 0106 0 053 clearance which will be ...

Page 26: ...owards a new duty cycle If the unity gain crossover fre quencyissetto50kHz theCOMPpinwillgetto60 ofthe way to 90 duty cycle in 3µs Now the inductor is seeing 43V across itself for a large portion of the cycle and its current will increase from 1A at a rate set by di dt V L If theinductorvalueis10µH thepeakdi dtwillbe43V 10µH or 4 3A µs Sometime in the next few micro seconds after the switch cycle ...

Page 27: ...hem in parallel togetthedesiredvalue Thisgivesanoninductiveresistive load which can dissipate 2 5W continuously or 50W if pulsed with a 5 duty cycle enough for most LTC3703 5 circuits SoldertheMOSFETandtheresistor s ascloseto the output of the LTC3703 5 circuit as possible and set up thesignalgeneratortopulseata100Hzratewitha5 duty cycle This pulses the LTC3703 5 with 500µs transients10ms apart ad...

Page 28: ...ist When laying out the printed circuit board the following checklistshouldbeusedtoensureproperoperationofthe LTC3703 5 These items are also illustrated graphically in thelayoutdiagramofFigure20 Forlayoutofaboostmode converter layout is similar with VIN and VOUT swapped Check the following in your layout 1 Keepthesignalandpowergroundsseparate Thesignal ground consists of the LTC3703 5 GND pin the ...

Page 29: ... injected by the drivers Connect this capacitor close to the IC between the VCC and GND pins and keep the ground side of the VCC capacitor signal ground isolated from the ground side of the DRVCC capacitor power ground 7 For optimum load regulation and true remote sensing the top of the output resistor divider should connect independently to the top of the output capacitor Kelvin connection stayin...

Page 30: ...P L1 8µH D1 MBR1100 VOUT 12V 10A COUT 220µF 25V 2 DB MMDL770T1 VCC 5V TO 15V CSS 0 1µF 37035 TA01 CDRVCC 10µF CVCC 1µF M1 Si7850DP 22µF 25V LTC3703 5 MODE SYNC FSET COMP FB IMAX INV RUN SS GND VIN BOOST TG SW VCC DRVCC BG BGRTN CIN 22µF 100V VIN 6V TO 60V CC2 1000pF CC3 2200pF RC1 10k RMAX 15k RC2 100Ω OPTIONAL ZENER PROVIDES UNDERVOLTAGE LOCKOUT ON INPUT SUPPLY VUVLO 5 VZ R1 113k 1 R2 21 5k 1 RF ...

Page 31: ...MIN RECOMMENDED SOLDER PAD LAYOUT 150 165 0250 BSC 0165 0015 045 005 DIMENSION DOES NOT INCLUDE MOLD FLASH MOLD FLASH SHALL NOT EXCEED 0 006 0 152mm PER SIDE DIMENSION DOES NOT INCLUDE INTERLEAD FLASH INTERLEAD FLASH SHALL NOT EXCEED 0 010 0 254mm PER SIDE INCHES MILLIMETERS NOTE 1 CONTROLLING DIMENSION INCHES 2 DIMENSIONS ARE IN 3 DRAWING NOT TO SCALE G28 SSOP 0204 0 09 0 25 0035 010 0 8 0 55 0 9...

Page 32: ...lithic 1 5A 500kHz Step Down Regulator 5 5V VIN 60V 2 5mA Supply Current 16 Pin SSOP LT3010 50mA 3V to 80V Linear Regulator 1 275V VOUT 60V No Protection Diode Required 8 Lead MSOP LT3430 LT3431 Monolithic 3A 200kHz 500kHz Step Down Regulator 5 5V VIN 60V 0 1Ω Saturation Switch 16 Pin SSOP LT3433 Monolithic Step Up Step Down DC DC Converter 4V VIN 60V 500mA Switch Automatic Step Up Step Down Singl...

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