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dc2196af

DEMO MANUAL DC2196A

Quick start proceDure

External Connections
J1:

 Interface connector to DC590 controller or Linduino. 

Provides OVP power, SPI interface, and board identifica-

tion.

V

, GND, V

+

:

 Analog supplies, connected to the LTC2666 

V

+

 and V

 pins. Nominally ±15V for operation in all Soft-

Span  ranges.  Refer  to  the  data  sheet  for  other  supply 

configurations.

GND:

 Four additional ground posts and exposed ground 

plane around board edge allow solid connection to pro-

totype circuitry and measurement equipment.

VCC:

  Analog  supply  voltage.  Normally  supplied  by  an 

onboard  LT1761-5  fixed 5V  regulator  that  is  powered 

from the V

+

 supply. For single 5V supply applications, VCC 

may be tied directly to V

+

 and supplied with 4.5V to 5.5V.

IOVCC:

 Digital interface power. No connection to this pin is 

required when used with a DC590 or Linduino controller. 

If another controller is used, connect to digital supply that 

powers the SPI bus controller (1.71 to 5.5V).

REF:

  Connection  to  the  REF  pin.  In  internal  reference 

mode,  the  reference  voltage  may  be  monitored  at  this 

point. Placing REF_SEL jumper in the EXT position allows 

an external reference to be connected to this point.

MUX:

  Monitor  Mux  output.  Allows  surveying  the  DAC 

outputs under software control. Must be measured with 

a high impedance meter (output impedance is nominally 

2.1kΩ).

VOUT0 to VOUT7:

 DAC outputs.

CLR

:

 Asynchronous clear input (pulled high to OVP with 

a 4.99k resistor). Pull to ground to reset the DAC to the 

power-on reset value (determined by MSPx pins.)

TGP:

 Toggle input (pulled high to OVP with a 4.99k resis-

tor). A high level on this pin enables software toggling. See 

data sheet for a complete description of toggle operation.

LDAC

:

 Asynchronous DAC update. If 

CS

/LD is high at the 

falling edge of 

LDAC

, DAC outputs will be updated with 

the contents of the input registers. If 

CS

/LD is low when 

LDAC

 goes low, the DAC registers are updated after 

CS

/

LD returns high.

OVRTMP

:

 Overtemperature pin (pulled high to IOVCC with 

a 4.99k resistor). The LTC2666 pulls this pin low if the die 

temperature exceeds approximately 160°C. It is released 

on the next rising edge of 

CS

/LD.

Summary of Contents for DC2026

Page 1: ...V to 10V 2 5V 5V and 10V AtogglefeatureallowsanyorallDACstoswitch betweentwoprogrammedcodesviaasingleSPIcommand or by the TGP input pin The versatile SPI interface can operate on any logic level betwe...

Page 2: ...he controller to the host PC s USB port and run QuikEval The DC2196A software will be downloaded and installed after which a jumper setting window will appear as shown in Figure 2 The default settings...

Page 3: ...3 dc2196af DEMO MANUAL DC2196A Figure 3 Main Control Panel Quick Start Procedure...

Page 4: ...ection to the REF pin In internal reference mode the reference voltage may be monitored at this point Placing REF_SEL jumper in the EXT position allows an external reference to be connected to this po...

Page 5: ...FCOMP pin MSP0 MSP1 MSP2 JP2 JP3 JP4 Manual Span control Setting all jumpers to the 1 position Default selects SoftSpan operation with a power up default span of 0V to 5V and reset to Zero Scale Other...

Page 6: ...JP4 HEADER 2MM SINGLE STR 3POS SULLINS NRPN031PAEN RC 7 1 J1 CONN HEADER 14POS 2MM VERT GOLD MOLEX 87831 1420 8 1 LED1 LED RED LED ROHM SML 010VT ROHM SML 010VTT86L 9 1 Q1 MOSFET N CH 60V 300MA SOT 23...

Page 7: ...T MARK T N A LTC2666IUH FAMILY DEMO CIRCUIT 2196A SIZE DATE IC NO REV SHEET OF TITLE APPROVALS PCB DES APP ENG TECHNOLOGY Fax 408 434 0507 Milpitas CA 95035 Phone 408 432 1900 1630 McCarthy Blvd LTC...

Page 8: ...DING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONS...

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