Linear Technology DC1865A, Demo Manual

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5
dc1865af
DEMO MANUAL DC1865A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
schematic Diagram
1. ALL RESISTORS ARE 0402. ALL CAPACITORS ARE 0402.
NOTE: UNLESS OTHERWISE SPECIFIED
C1 0.01uF
0603
C1 0.01uF
0603
R10 604 1% 0603 R10 604 1% 0603
JP5 3.3V JP5 3.3V
JP2
1.5V
JP2
1.5V
R4 191K 1% R4 191K 1%
JP6
5V
JP6
5V
E2
GND
E2
GND
E8
PWRGD
E8
PWRGD
C5 10uF 50V
1210
C5 10uF 50V
1210
JP7 USER
SELECT
JP7 USER
SELECT
R5 274K 1% R5 274K 1%
R12 60.4K
1%
R12 60.4K
1%
R6 442K
1%
R6 442K
1%
R8 1.00K
1%
0603
R8 1.00K
1%
0603
C9 0.1nF C9 0.1nF
JP1 1.2V JP1 1.2V
R2 90.9K
1%
R2 90.9K
1%
E7
TEMP
E7
TEMP
E6
IMON
E6
IMON
R13 499K
1% 0603
R13 499K
1% 0603
R9 121k
1% 0603
R9 121k
1% 0603
E4
GND
E4
GND
R3 121K
1%
R3 121K
1%
E3
VOUT
500mA
E3
VOUT
500mA
E5
FAULT1
E5
FAULT1
C8 0.01uF
0603
C8 0.01uF
0603
R7 OPT 0603 R7 OPT 0603
C6 10uF
50V
1210
C6 10uF
50V
1210
R11 499K
1% 0603
R11 499K
1% 0603
R1 60.4K
1%
R1 60.4K
1%
JP8
ON OFF
SHDN
JP8
ON OFF
SHDN
1 3 2
U1 LT3055EDE U1 LT3055EDE
REF/BYP
11
IMIN
9
IMON
8
IN
2
FAULT1
4
GND
17
SHDN
3
IN
1
OUT
15
OUT
16
ADJ
14
GND
12
IMAX
10
FAULT2
5
PWRGD
6
TEMP
7
GND
13
C4 22nF C4 22nF
JP3
1.8V
JP3
1.8V
C3
0.1uF
C3
0.1uF
+
C7
OPT
"D" Case
+
C7
OPT
"D" Case
E9
FAULT2
E9
FAULT2
E1
VIN
2.2V - 45V
E1
VIN
2.2V - 45V
C2 0.1uF C2 0.1uF
+
CIN 22uF
50V
+
CIN 22uF
50V
R14 499K
1% 0603
R14 499K
1% 0603
JP4 2.5V JP4 2.5V
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