LT8708
49
Rev 0
spacing. Avoid having sense lines pass through noisy
areas, such as switch nodes. The optional filter network
capacitor between CSP and CSN should be as close
as possible to the IC. Ensure accurate current sensing
with Kelvin connections at the R
SENSE
resistors.
• Connect the V
C
pin compensation network closely to
the IC, between V
C
and the signal ground pins. The
capacitor helps to filter the effects of PCB noise and
output voltage ripple voltage from the compensa-
tion loop.
• Connect the INTV
CC
and GATEV
CC
bypass capacitors
close to the IC. The capacitors carry the MOSFET
drivers’ current peaks.
• Run the trace from the LT8708’s SW1/SW2 pin to
the drain of M2/M3 in parallel with the trace from the
GATEV
CC
capacitor’s GND to the C
IN
GND. Route the
traces (as much as possible) directly above/below one
another on adjacent layers and in such a way that they
carry currents in opposite directions.
• Attention is required when making the PCB layout for
R
SENSE1
and R
SENSE2
, especially for sense resistor
values smaller than 5mΩ. Improper PCB layout can
yield significant errors in the sense voltage.
HOT PLUGGING CONSIDERATIONS
When connecting a battery to an LT8708 application, there
can be significant inrush current due to charge equalization
between the partially charged battery stack and the charger
output capacitors. To a lesser extent a similar effect can
occur when connecting a powered DC supply to the input
or output. The magnitude of the inrush current depends
on (1) the battery or supply voltage, (2) ESR of the input
or output capacitors, (3) initial voltage of the capacitors,
and (4) cable impedance. Excessive inrush current can lead
to sparking that can compromise connector integrity and/
or voltage overshoot that can cause electrical overstress
on LT8708 pins.
Excessive inrush current can be mitigated by first con-
necting the battery or supply to the charger through a
resistive path, followed quickly by a short circuit. This
can be accomplished using staggered length pins in a
APPLICATIONS INFORMATION
multi-pin connector. Alternatively, consider the use of a
Hot Swap controller such as the LT1641, LT4256, etc. to
make a current limited connection.
DESIGN EXAMPLE
V
IN
= 8V to 25V
V
IN_FBIN
= 12V (V
IN
regulation voltage set by FBIN loop)
V
OUT_FBOUT
= 12V (V
OUT
regulation voltage set by FBOUT loop)
I
OUT(MAX,FWD)
= 5A
I
IN(MAX,RVS)
= 3A
ƒ = 150kHz
This design operates in CCM.
Maximum ambient temperature = 60°C
Power Flow Verification: Determine which conditions in
Table 6(a) apply to this application. In this design example,
the VINHIMON and VOUTLOMON are disabled, therefore
the conditions highlighted in blue in the copy of Table 6(a)
apply to this application.
Table 9. A Copy of Table 6(a)
V
OUT
<
V
OUT_VOUTLOMON
V
OUT
>
V
OUT_VOUTLOMON
&
V
OUT
< V
OUT_FBOUT
V
OUT
>
V
OUT_FBOUT
V
IN
< V
IN_FBIN
No Power
Transfer
B
B
V
IN
> V
IN_FBIN
&
V
IN
<
V
IN_VINHIMON
A
D
C
V
IN
>
V
IN_VINHIMON
A
D
No Power
Transfer
Next, check each of these highlighted cells using Table 6(b)
with MODE = CCM. A copy of Table 6(b) is shown below:
9(b). A Copy of Table 6(b)
MODE =
BURST
MODE = CCM
MODE =
DCM/HCM,
DIR = FWD
MODE = DCM/
HCM, DIR = RVS
A
Power Flows from V
IN
to V
OUT
No Power Flow
B
No Power
Flow
Power Flows
from V
OUT
to V
IN
No Power
Flow
Power Flows
from V
OUT
to V
IN
C
No Power Flow
D
Power Flows from V
IN
to V
OUT
