LT8708
15
Rev 0
BLOCK DIAGRAM
Figure 1. Block Diagram
–
+
A5
–
+
A4
–
+
A3
–
+
OSC
–
+
A2
START-UP LOGIC
UV_V
IN
UV_LDO33
UV_GATEV
CC
UV_INTV
CC
OT
3.3V
LDO
REG
LDO
REG
INTERNAL
SUPPLY2
INTERNAL
SUPPLY1
LDO33
EN
6.3V
LDO
REG
–
+
–
+
SS
R
SENSE1
V
IN
LDO33
LDO33
–
+
6.3V
LDO
REG
V
IN
EXTV
CC
INTV
CC
EN
1.234V
6.4V
R
SHDN2
SHDN
R
SHDN1
3.3V
R
SENSE
CSN
CSP
SWEN
V
INCHIP
CSNIN
CSPIN
IMON_INN
MODE
CLKOUT
SYNC
RT
IMON_INP
RVS
DIR
RVS
V
C
–
+
EA5
–
+
EA6
–
+
EA4
–
+
EA3
1.209V
IMON_INP
–
+
EA1
–
+
EA2
1.21V
IMON_INN
1.207V
1.205V
1.207V
–
+
A6
A1
–
+
–
+
1.207V
–
+
EA7
BOOST CAPACITOR
CHARGE CONTROL
CONTROL
AND
STATE
LOGIC
BOOST1
TG1
SW1
GATEV
CC
BG1
GND
BG2
SW2
TG2
BOOST2
R
FBIN1
R
FBOUT1
R
FBOUT2
R
FBIN2
FBIN
FBOUT
V
IN
R
SENSE2
V
OUT
R
LOMON1
R
LOMON2
IMON_ON
ICP
ICN
R
LOMON3
R
HIMON3
R
HIMON2
R
HIMON1
IMON_OP
VOUTLOMON
VINHIMON
RVSOFF
R
RVSOFF
CSNOUT
CSPOUT
C
B2
D
B2
M3
V
IN
LDO33
M4
M2
D3
(OPT)
D4
(OPT)
C
B1
M1
D2
(OPT)
D1
(OPT)
D
B1
8708 F01
