3-34
5. I/O BOARD BLOCK DIAGRAM
SI
F
IC
70
2
S-2
4C
S1
6A
01
1
EE
PR
O
M
SC
AR
T 1
TU_L/R_OUT
SW
_A
_O
U
T_
L/
R
AIN
_D
O
SW
_V
_O
U
T
A_O
UT_
L/R
R
_O
U
T
G
_O
U
T
B
_O
U
T
C
VB
S_
O
U
T
Y_
O
U
T
C
_O
U
T
R
_P
r_
O
U
T
G
_P
y_
O
U
T
B
_P
b_
O
U
T
R
_S
C
A
R
T_
O
U
T
G
_S
C
A
R
T_
O
U
T
B
_S
C
A
R
T_
O
U
T
EU
1_
A
_O
U
T_
L/
R
EU
1_
V_
O
U
T
EU
1_
A
_I
N
_L
/R
EU
1_
V_
IN
EU
2_
A
_O
U
T_
L/
R
EU
2_
V_
O
U
T
EU
2_
A
_I
N
_L
/R
EU
2_
V_
IN
/
S.
VI
D
EO
_Y
IC
90
1
SA
A
71
38
A
V
D
EC
O
D
ER
Pr
_R
C
A
_O
U
T
Y_
R
C
A
_O
U
T
Pb
_R
C
A
_O
U
T
C
_S
EP
A
_O
U
T
Y_
SE
PA
_O
U
T
I2
C
I/
O
I2
C
I/
O
C
O
M
PO
N
EN
T
REA
R.A
UD
IO
S/
W
B
LO
C
K
(Q
16
4/
15
8/
16
3)
S-VIDE
O
S/
W
B
LO
C
K
(Q
16
4/
15
8/
16
3)
SW
_1
2V
G
SW
_5
.3
VA
SW
_F
D
(+
)
IC
80
2
12V
A
5.3
VA
FD
(+)
TU
_V
_O
U
T
SC
AR
T 2
SC
AR
T 2
D
A
C
_A
L/
R
_O
U
T
A
U
D
IO
M
ut
e
B
lo
ck
SY
S_
M
U
TE
_L
A
_O
U
T_
L/
R
IC
60
6
74
H
C
40
66
IC
60
6
74
H
C
40
66
A
FT
TU
_S
EC
A
M
_H
TU
N
ER
_S
EL
TS_
DA
TA
[0]
TS_CLK
TS_
VA
L
TS_SYNC
VIN
_IN
T
VIN
_D
[7:
0]
AIN
_FS
YN
C
AIN
_SC
LK
AIN
_M
CLK
I2C
M
AIN
Z_
M
U
TE
_L
/R
SC
L /
SD
A
IC
80
1
M
M
17
63
A
V S
w
itc
h
+
Vi
de
o
B
uf
fe
r
IC
80
1
M
M
17
63
A
V S
w
itc
h
+
Vi
de
o
B
uf
fe
r
C F
SE
C
A
M
_A
M
VIN
_VS
YN
C
VIN_CLK
SYN
C_D
ET_
H
Z-MUTE_CTL_H
SLE
EP_
OFF
SPI
_I/O
to
M
ain
/ R
ST_
SA
A71
38
TU
NER
_R
ESE
T_L
FR
O
N
T.
A
V
IN
TI
M
ER
B
O
A
R
D
F_
C
VB
S_
IN
F_
A_
L/
R
_I
N
IC
70
3
74
H
C
T1
25
IC
70
3
74
H
C
T1
25
HD
MI_
CEC
SPI
SP
I
SP
D
IF
_O
U
T
O
PT
IC
A
L
C
O
A
XI
A
L
AO
UT_
D0
AO
UT_
MC
LK
AO
UT_
FSY
NC
AO
UT_
SC
LK
HO
ST_
EN
A_L
HO
ST_
DAT
A_I
N
HO
ST_
CLK
_IN
M
IC
O
M
CI Ca
rd
Boar
d
TS
_D
A
TA
[7
:0
]
TUNE
R
TU
60
1
(A
nalog/
D
ig
ita
l)
IC
11
01
D
M
N
86
73
ST
B
/H
D
D
/D
VD
R
ec
or
de
r P
ro
ce
ss
or
IC
11
01
D
M
N
86
73
ST
B
/H
D
D
/D
VD
Recorder Processo
r
FD
(+
)
FD
(-)
C
I_
5V
3.
3V
2.
5V
LD
O
B
LO
C
K
I/O
LD
O
B
LO
C
K
I/O
-2
9V
A
5.
3V
A
14
VA
5.
0V
D
3.
3V
A
1.
8V
1.
25
V
PW
R_C
TL_
H
1W
_H
M
A
IN
B
O
A
R
D
IC
80
3
PC
M
17
80
A
U
D
IO
D
A
C
IC
80
3
PC
M
17
80
A
U
D
IO
D
A
C
Summary of Contents for RHT497H
Page 11: ...1 10 MEMO ...
Page 34: ...3 19 DDR Bank Address 3 4 6 5 DDR RAS CAS 4 5 DDR Write Enable 6 3 ...
Page 35: ...3 20 12C_SDA 7 12C_SCL 8 IC1101 7 8 ...
Page 37: ...3 22 3 AUDIO BLOCK 1kHz SINEWAVE INPUT AOUT_D0 3 AOUT_MCLK 4 AOUT_FSYNC 1 AOUT_SCLK 2 1 2 3 4 ...
Page 38: ...3 23 SPDIF_OUT 5 5 IC1101 A OUT_l A OUT_R 6 7 7 6 ...
Page 39: ...3 24 4 SERIAL INTERFACE BLOCK Between MAIN I O E5_SPI_MISO 3 E5_SPI_CLK 1 E5_SPI_MOSI 2 1 2 3 ...
Page 40: ...3 25 5 TUNER BLOCK 1 SIF IC901 1 ...
Page 43: ...3 28 2 WIRING DIAGRAM 2 1 2 3 4 5 6 7 8 ...
Page 44: ...3 29 1 2 3 4 5 6 7 8 Option ...
Page 57: ...3 42 MEMO ...
Page 59: ...3 45 3 46 2 MPEG CIRCUIT DIAGRAM ...
Page 60: ...3 47 3 48 3 FLASH DDR CIRCUIT DIAGRAM ...
Page 61: ...3 49 3 50 4 IEEE1394 CIRCUIT DIAGRAM ...
Page 62: ...3 51 3 52 5 ATAPI HDMI USB CIRCUIT DIAGRAM ...
Page 63: ...3 53 3 54 6 I O µ COM CIRCUIT DIAGRAM ...
Page 64: ...3 55 3 56 7 SCART RCA CIRCUIT DIAGRAM ...
Page 65: ...3 57 3 58 8 TUNER DECODER CIRCUIT DIAGRAM ...
Page 66: ...3 59 3 60 9 LDO CIRCUIT DIAGRAM ...
Page 67: ...3 61 3 62 10 COMMON INTERFACE BOARD CIRCUIT DIAGRAM OPTIONAL ...
Page 68: ...3 63 3 64 11 HDMI DAUGHTER BOARD CIRCUIT DIAGRAM ...
Page 69: ...3 65 3 66 12 TIMER CIRCUIT DIAGRAM ...
Page 70: ...3 67 3 68 13 KEY CIRCUIT DIAGRAM ...
Page 75: ...3 77 3 78 PRINTED CIRCUIT BOARD DIAGRAMS 1 MAIN P C BOARD TOP VIEW BOTTOM VIEW ...
Page 76: ...3 79 3 80 2 I O P C BOARD TOP VIEW ...
Page 77: ...3 81 3 82 I O P C BOARD BOTTOM VIEW ...
Page 78: ...3 83 3 84 3 SMPS P C BOARD TOP VIEW BOTTOM VIEW ...
Page 79: ...3 85 3 86 4 TIMER KEY P C BOARD TOP VIEW BOTTOM VIEW ...
Page 81: ...3 89 3 90 MEMO MEMO ...
Page 98: ...4 17 2 DISC SPECIFICATION 3 DISC MATERIALS 1 DVD ROM ...
Page 103: ...4 22 3 Layout of DVD RW disc ...
Page 104: ...4 23 4 Layout of DVD R RW disc ...
Page 133: ...4 52 MEMO ...
Page 134: ...4 53 4 54 CIRCUIT DIAGRAM ...
Page 136: ...4 57 4 58 PRINTED CIRCUIT BOARD DIAGRAMS 1 MAIN P C BOARD TOP VIEW ...