
3-40
8. PS9829B
8-1. PIN CONFIGURATION
IO_VDD
PLL_DVDD
IO_VS
S
IO_VSS
PLL_AVDD
IO_VS
S
PLL_
A
VS
S
PLL
_DV
S
S
ML
RCK
MB
C
K
MSDIN0
MIC_LRCK
MIC_BCK
MIC_MCLK
PWM_HP_R_P
IO
_VS
S
PWM2_P
PWM2_M
PWM3_P
PWM3_M
PWM4_P
IO_VDD
PWM4_M
SPI/I2C
/CS/I2C_AD2
SI/I2C_AD0
SO/SDA
SCK/SCL
/RESET
SCAN_ENA
CLK_IN
DVSS
IO_VSS
IO_VS
S
IO
_VS
S
DVDD
DV
S
S
IO
_VDD
IO
_VS
S
MSDIN1
MSDIN2
SLRCK
SB
C
K
DVS
S
PWM5_P
PWM5_M
DVD
D
TEST_MODE3
DVSS
IO
_VS
S
PWM6_P
PWM6_M
IO
_VS
S
IO_VS
S
PWM1_P
PWM1_M
OVERLOAD
IO_VSS
IO_VSS
SS
D
IN
1
EXT_MUTE
DVDD
IO
_VDD
DVDD
SS
D
IN0
MSDIN3
SS
D
IN
2
SSDIN3
IO_VSS
IO_VDD
MIC_SDIN
PWM_SWL_P
PWM_SWL_M
PWM_HP_L_P
PWM_HP_L_M
PWM_HP_R_M
IO
_VS
S
PWM7_P
PWM7_M
PWM8_P
PWM8_M
EPD_ENA
TEST_MODE2
TEST_MODE1
IO_VSS
DMIX_LRCK
DMIX_BCK
DMIX_SDOUT
DMIX_MCLK
98
99
100
96
97
93
94
95
91
92
85
86
87
88
89
90
83
84
81
82
71
72
73
74
75
61
62
63
64
65
66
67
68
69
70
53
54
55
56
57
58
59
51
52
60
46
47
48
49
50
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
30
31
32
33
34
35
36
37
26
27
28
29
76
77
78
79
80
17
18
19
20
38
39
40
41
42
43
44
45
21
22
23
24
25
IO
_VDD
IO_VSS
IO_VDD
DVDD
DVSS
IO_VDD
IO
_VDD
IO
_VDD
DVSS
DVDD
IO_VDD
PULSUS
PS9829B
8-2. BLOCK DIAGRAM
PLL
PWM
Modulator
Internal Controls
MLRCK
MBCK
MSDIN[0:3]
CLK
_
IN
SCK/SCL
SO/SDA
SI/I2C_AD0
/CS/I2C_AD2
PWM2_P/M
PWM3_P/M
PWM4_P/M
PWM5_P/M
PWM6_P/M
/RE
S
E
T
OVERLOAD
EXT_MUTE
PWM1_P/M
PWM8_P/M
Internal Clock
SPI/I2C
PWM7_P/M
SLRCK
SBCK
SSDIN[0:3]
PWM_HP_R_P/M
PWM_HP_L_P/M
EPD_ENA
PWM_SWL_P/M
MIC_LRCK
MIC_BCK
MIC_SDIN
MIC_MCLK
DMIX_MCLK
OLRCK
OBCK
DMIX_SDOUT
PLL
_D
VD
D
PLL
_D
VS
S
PLL
_AV
D
D
PLL_
A
VS
S
DV
D
D
DV
SS
IO_
V
DD
IO
_V
SS
Power Supply
Reset & Power Down
Internal Reset
Serial Audio
Output
interface
Automatic
Gain
Limiter
Main
Volume
Trim
Volume
Bass
Manager
4 Band
EQ
Down
Mixer
Mixer
Mic.
Input
Processor
Input
Mapper
Sample
Rate
Converter
Input
&
Output
MUX
Host
Interface
(I
2
C, SPI)
Serial
Audio
Output
interface
Ou
tp
u
t Ma
pp
er
POP
NR
Summary of Contents for MBD-D102X
Page 7: ...1 6 MEMO ...
Page 10: ...2 5 3 SPEAKER SECTION MBS D102V 750 751 752 754 755 757 A70A 758 A70 757A 759 756 753 ...
Page 35: ...3 24 4 FOCUS WAVEFORM 1 FDO 2 F 3 F INSERT CD INSERT DVD 1 FDO 2 F 3 F ...
Page 37: ...3 26 7 TRACKING SIGNAL 1 Tro 2 Tr 3 Tr 8 RF WAVEFORM ...
Page 38: ...3 27 9 DISK TYPE JUGEMENT WAVEFORM 1 F 2 FDO 3 SVRRF DVD CD ...
Page 50: ...3 39 7 MC4580 7 1 PIN CONFIGURATION 7 2 TEST CIRCUIT 7 3 ABSOLUTE MAXIMUM RATINGS TA 25 ...
Page 60: ...3 49 3 50 WIRING DIAGRAM ...
Page 62: ...3 53 3 54 2 MAIN FRONT BLOCK DIAGRAM ...
Page 64: ...3 57 3 58 2 MAIN INTERFACE PWM SCHEMATIC DIAGRAM ...
Page 65: ...3 59 3 60 3 MPEG SCHEMATIC DIAGRAM ...
Page 66: ...3 61 3 62 4 SERVO SCHEMATIC DIAGRAM ...
Page 67: ...3 63 3 64 5 INTERFACE SCHEMATIC DIAGRAM ...
Page 68: ...3 65 3 66 6 FRONT SCHEMATIC DIAGRAM ...
Page 69: ...3 67 3 68 7 FRONT MIC SCHEMATIC DIAGRAM ...
Page 70: ...3 69 3 70 8 IPOD 1 SCHEMATIC DIAGRAM OPTION ...
Page 71: ...3 71 3 72 9 IPOD 2 SCHEMATIC DIAGRAM OPTION ...
Page 72: ...3 73 3 74 10 2 CHANNEL AMP SCHEMATIC DIAGRAM ...
Page 73: ...3 75 3 76 11 BLUTHOOTH MODULE SCHEMATIC DIAGRAM OPTION ...
Page 75: ...3 79 3 80 1 MAIN P C BOARD TOP VIEW PRINTED CIRCUIT BOARD DIAGRAMS ...
Page 76: ...3 81 3 82 MAIN P C BOARD BOTTOM VIEW ...
Page 77: ...3 83 3 84 2 FRONT P C BOARD TOP VIEW BOTTOM VIEW ...
Page 78: ...3 85 3 86 3 SMPS P C BOARD TOP VIEW BOTTOM VIEW ...