6. BLOCK DIAGRAM
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Copyright © 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
[LGE425] BT/WLAN/FM Block Diagram
GPIO_5
GPIO_62
GPIO_63
GPIO_[72:75]
LINE_R_IP
LINE_L_IP
GPIO_83
GPIO_46
GPIO_45
GPIO_44
GPIO_43
GPIO_6
GPIO_68
GPIO_69
GPIO_70
GPIO_71
WLAN_RST_N
TCXO_IN
SDIO_CLK
SLEEP_CLK
SDIO_CMD
PDET_IN
RF_TX_PA
SDIO_DATA[3:0]
RF_RX
FM_LO_R
BT_RFIO
FM_LO_L
FM_RDS_INT
BT_UART_TXD
BT_UART_RXD
FM_HRX_IN
BT_UART_CTS
BT_UART_RTS
SYS_RST_N
BT_PCM_OUT
BT_PCM_IN
SLEEP_CLK
BT_PCM_SYNC
BT_PCM_CLK
WLAN_RST_N
WLAN_CLK
WLAN_CMD
WLAN_SDIO[3:0]
FM_R
FM_L
FM_RDS_INT
BT_UART_TX
BT_UART_RX
BT_UART_CTS
BT_UART_RTS
BT_RESET_N
BT_PCM_IN
BT_PCM_OUT
BT_PCM_SYNC
BT_PCM_CLK
M
SM
7225A
W
C
N
1314
W
C
N
2243
CPL
WLAN_TX
WLAN_RX
BT_TRX
A
FE
M
-S
102
ANT
Ear
-Jack
LGE430 BT/WLAN/FM Block Diagram
32.7678KHz
19.2MHz
32.7678KHz