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Copyright © 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
6. CIRCUIT DIAGRAM
C2300
6.8n
0.47u
C2304
VREG_S1_1P15
VREG_S1_1P15
VREG_S1_1P15
VREG_S2_1P15
VREG_L1_1V225
VREG_L2_1V2
VREG_L3_1V15
VREG_L2_1V2
VREG_L20_3V075
VREG_L23_2V95
VREG_L22_2V95
VREG_L3_1V15
VREG_L3_1V15
VREG_L3_1V15
VREG_L4_1V2
VREG_L6_1V8
VREG_L6_1V8
VREG_L6_1V8
VREG_L6_1V8
VREG_L6_1V8
VREG_L7_1V9
VREG_L8_1V8
VREG_L10_1V8
VREG_L21_2V75
VREG_L24_1V3
VREG_LVS1_1V8
0
R2301
0.1u
C2368
47n
C2303
0.1u
C2308
C2301
1u
4.7u
C2309
22n
C2305
4.7n
C2306
C2307
10n
33n
C2302
C234
4
10n
C2345
33n
0.1u
C234
3
C2342
470n
C234
6
4.7
u
6.3V
U2100
VDD_P1_01
AF39
VDD_P1_02
AJ2
VDD_P1_03
AM39
VDD_P1_04
AN2
VDD_P1_05
AT39
VDD_P1_06
AW32
VDD_P1_07
AY13
VDD_P1_08
AY21
VDD_P1_09
B23
VDD_P1_10
B33
VDD_P1_11
F39
VDD_P1_12
M39
VDD_P1_13
V39
VDD_P2
R6
VDD_P3_01
AA34
VDD_P3_02
AG34
VDD_P3_03
AK33
VDD_P3_04
AL8
VDD_P3_05
AM13
VDD_P3_06
AN16
VDD_P3_07
C18
VDD_P3_08
H31
VDD_P3_09
J24
VDD_P3_10
J34
VDD_P3_11
V7
VDD_P3_12
Y35
VDD_P4
H25
VDD_P5
E10
VDD_P6
E18
VDD_P7
J8
VDD_P8
H27
VDD_DDR_CORE_1P8_01
A18
VDD_DDR_CORE_1P8_02
A34
VDD_DDR_CORE_1P8_03
AB1
VDD_DDR_CORE_1P8_04
AB39
VDD_DDR_CORE_1P8_05
AY7
VDD_DDR_CORE_1P8_06
AY33
VDD_DDR_CORE_1P8_07
B5
VDD_DDR_CORE_1P2_01
AU2
VDD_DDR_CORE_1P2_02
AU36
VDD_DDR_CORE_1P2_03
AW16
VDD_DDR_CORE_1P2_04
B19
VDD_DDR_CORE_1P2_05
B37
VDD_DDR_CORE_1P2_06
W38
VDD_EBI0_CDC_01
AD31
VDD_EBI0_CDC_02
R30
VDD_EBI0_CDC_03
AJ28
VDD_EBI0_CDC_04
L30
VDD_EBI0_CDC_05
AJ10
VDD_USB_3P3
H21
VDD_USB_1P8
F19
VDD_USB_CORE
F23
VDD_A2_01
Y7
VDD_A2_02
AD9
VDD_TXDAC
AA10
VDD_QFPROM_PRG
G26
VDD_SDC_CDC_01
H7
VDD_SDC_CDC_02
K7
VREF_SDC
N4
VREF_UIM
D19
VDD_PLL1_01
T23
VDD_PLL1_02
AC18
VDD_PLL1_03
AE10
VDD_PLL1_04
AE26
VDD_PLL2_01
T29
VDD_PLL2_02
AC10
VDD_PLL2_03
N20
VDD_WLAN
T33
VDD_A2_03
AJ8
VDD_A1_01
AH7
VDD_A1_02
AK7
VDD_MIPI_CSI
AP25
VDD_MIPI_DSI_1P2
AY17
VDD_MIPI_DSI_1P8
AM19
VDD_MIPI_DSI_0P4
AL16
MIPI_DSI_LDO
AM23
VDD_CORE_01
AA16
VDD_CORE_02
AA18
VDD_CORE_03
AA22
VDD_CORE_04
AA24
VDD_CORE_05
AA30
VDD_CORE_06
AB21
VDD_CORE_07
AB23
VDD_CORE_08
AB27
VDD_CORE_09
AB29
VDD_CORE_10
AC14
VDD_CORE_11
AC16
VDD_CORE_12
AC24
VDD_CORE_13
AC30
VDD_CORE_14
AD13
VDD_CORE_15
AD15
VDD_CORE_16
AD21
VDD_CORE_17
AE14
VDD_CORE_18
AE16
VDD_CORE_19
AE18
VDD_CORE_20
AE24
VDD_CORE_21
AE30
VDD_CORE_22
AE32
VDD_CORE_23
AF21
VDD_CORE_24
AG18
VDD_CORE_25
AG26
VDD_CORE_26
AH21
VDD_CORE_27
AJ14
VDD_CORE_28
AJ20
VDD_CORE_29
AJ26
VDD_CORE_30
AJ30
VDD_CORE_31
AK11
VDD_CORE_32
AK13
VDD_CORE_33
AK15
VDD_CORE_34
AK19
VDD_CORE_35
AK21
VDD_CORE_36
AL14
VDD_CORE_37
AL20
VDD_CORE_38
AL26
VDD_CORE_39
AL30
VDD_CORE_40
AM21
VDD_CORE_41
J20
VDD_CORE_42
L20
VDD_CORE_43
L26
VDD_CORE_44
M27
VDD_CORE_45
N28
VDD_CORE_46
N30
VDD_CORE_47
P23
VDD_CORE_48
P25
VDD_CORE_49
P31
VDD_CORE_50
U20
VDD_CORE_51
U22
VDD_CORE_52
U26
VDD_CORE_53
V23
VDD_CORE_54
V27
VDD_CORE_55
W14
VDD_CORE_56
W16
VDD_CORE_57
W22
VDD_CORE_58
W30
VDD_CORE_59
Y23
VDD_CORE_60
Y27
VDD_CORE_61
Y29
VDD_MEM_01
AA12
VDD_MEM_02
AA14
VDD_MEM_03
AA28
VDD_MEM_04
AC28
VDD_MEM_05
AD19
VDD_MEM_06
AD23
VDD_MEM_07
AE28
VDD_MEM_08
AF19
VDD_MEM_09
AF23
VDD_MEM_10
AF31
VDD_MEM_11
AG28
VDD_MEM_12
AH11
VDD_MEM_13
AH13
VDD_MEM_14
AH15
VDD_MEM_15
AH17
VDD_MEM_16
AH19
VDD_MEM_17
AH23
VDD_MEM_18
AH31
VDD_MEM_19
AJ24
VDD_MEM_20
L14
VDD_MEM_21
L32
VDD_MEM_22
M23
VDD_MEM_23
M25
VDD_MEM_24
N22
VDD_MEM_25
N26
VDD_MEM_26
N32
VDD_MEM_27
P27
VDD_MEM_28
R20
VDD_MEM_29
R22
VDD_MEM_30
T27
VDD_MEM_31
W12
VDD_MEM_32
W18
VDD_MEM_33
W20
VDD_APC_01
G12
VDD_APC_02
G14
VDD_APC_03
G16
VDD_APC_04
J10
VDD_APC_05
J12
VDD_APC_06
J16
VDD_APC_07
J18
VDD_APC_08
L8
VDD_APC_09
L10
VDD_APC_10
L12
VDD_APC_11
L16
VDD_APC_12
L18
VDD_APC_13
N8
VDD_APC_14
N10
VDD_APC_15
N12
VDD_APC_16
N14
VDD_APC_17
N16
VDD_APC_18
N18
VDD_APC_19
R8
VDD_APC_20
R10
VDD_APC_21
R12
VDD_APC_22
R14
VDD_APC_23
R16
VDD_APC_24
R18
VDD_APC_25
U8
VDD_APC_26
U10
VDD_APC_27
U12
VDD_APC_28
U14
VDD_APC_29
U16
VDD_APC_30
U18
VDD_APC_31
W8
VDD_APC_32
W10
C2341
47n
C2336
0.1u
C2358
0.1u
0.2
C2392
6.3V
1u
C2359
0.1u
L2300
2.2u
DNI
C2363
0.1u
C2366
0.1u
C2365
0.1u
C2367
C2362
0.1u
VREF_MSM_PX_MPP_1
0.1u
C2371
C2370
0.1u
C2372
0.1u
0.1u
C2369
C2361
0.1u
C2340
22n
C2391
0.1u
6.3V
1u
0.2
C2364
C2394
2.2u
C2383
0.1u
1
2
0.1u
C2389
0.1u
C2390
DNI
C233
7
C2349
0.1u
C2348
0.1u
0.1u
C2350
0.1u
C2351
C2347
1u
0.1u
C2335
C2334
0.1u
C2332
1u
0.1u
C2354
C2333
0.1u
0.1u
C2353
0.1u
C2355
C2338
DNI
DNI
C233
9
C2384
0.1u
0.1u
C2356
1u
C2352
C2385
0.1u
0.1u
C2386
0.1u
C2387
1
C2388
DNI
C2382
470n
1u
6.3V
C2360
0.2
0.1u
C2315
0.1u
C231
6
0.1u
C231
7
C2311
0.1u
0.1u
C231
2
C231
3
0.1
u
C2314
0.1u
3.3n
C2381
0.1u
C2321
0.1u
C2319
0.1u
C2320
0.1u
C2322
C2380
22
n
C2379
0.1u
C2378
6.8n
0.1u
C2327
0.1u
C2329
C2331
0.1u
C2330
0.1u
C2328
0.1u
C2310
1u
10
n
C2377
C2376
3.3n
C2374
2.2n
3.3n
C2373
C2395
0.1u
0.1u
C2396
0.1u
C2397
0.1u
C2398
C2399
0.1u
C2393
0.2
1u
6.3V
0.2
C2318
6.3V
1u
C2406
220n
C2375
220n
0.1u
C2400
C2401
0.1u
220n
C2404
C2403
0.1u
0.1u
C2402
Delete cap(06/03)
UIM1
UIM2
UIM3
SDC1
HSIC
SDCC2
(05/30)
(05/30)
QCT Ref.E(06/03)
QCT Ref.E(06/03)
QCT Ref.E(06/03)
QCT Ref.E(06/03)
NEED PDN
< 2-1-3-1-3_MSM8226_POWER >
Rev_0.4
Place the CAP very close
If there is DSDA, AD9 connect to +1V9_MSM_A2,
Add bypass cap 0.1uF
to VDDA_0P4_MIPI_DSI pin
Rev_0.4