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Copyright © 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
6. CIRCUIT DIAGRAM
DNI
R6621
C6613
DNI
DNI
C6606
C6926
1n
C6611
33p
1n
C6927
0
FB6923
R6100
51
C6925
82p
C6928
0.1u
1800
FB6613
R6101
DNI
DNI
R610
2
1000
FB6100
C6100
0.1u
R6620
0
C6615
1n
0
R6619
R6104
DNI
R6612
1K
J6600
S/W_Detect
SPK_L
SPK_R
MIC
GND
R6613
1.2K
C6612
DNI
47p
C6619
R6422
DNI
C6700
1n
R6622
0
FB6600
1800
56n
C6610
VA6600
R6103
DNI
R6924
0
DNI
R6923
C6701
1n
C6620
47p
VA6601
VA6602
1
2
R6614
0
DNI
R6615
0
R6616
100n
L6610
VA6603
FB6611
1800
1800
FB6612
+VPWR
VA6604
U4940
C2
A3
C3
A2
B2
B3
B1
C1
A1
VOUT1
GND1
SW
1
EN
SW
2
VOUT2
GND3
VIN
GND2
DNI
C6605
+5V0_SPK_BOOST
TP6106
TP6100
TP6101
R6108
0
C6104
2.2u
C6105
4.7u
4.7u
C6109
0
R6106
DNI
R6107
+VPWR
U6100
WCD9302
40
55
45
50
49
1
2
11
7
12
6
13
3
21
16
27
19
4
9
24
15
14
30
20
23
51
34
37
46
52
41
42
43
38
53
47
39
44
33
31
26
18
28
5
22
35
8
10
29
25
32
36
17
48
54 MIC_BIAS1
MIC_BIAS2
HPH_REF
LINE_OUT1
LINE_OUT2
GND2
MCLK
VDD_IO
RESET_N
VDD_VBAT
CCOMP
GND1
GND3
GND4
EAROP
EAROM
MODE
MIC1_INP
MIC1_INM
MIC2_INP
MIC2_INM
MIC3_INP
MIC3_INM
MIC4_INP
MIC4_INM
NC3
NC1
MBHC_HSDET
LDO_HI_CAP
NC2
GND_CFILT
SLIMBUS_CLK/I2C_SCL
SLIMBUS_DATA/I2C_SDA
I2S_WS
I2S_SCK
DMIC0_DATA/TX_I2S_SD0
DMIC0_CLK/RX_I2S_SD0
INTR
VDD_DIG
VDD_TX_RX
HPH_L
HPH_R
VDD_BUCK
BUCK_VSW
BUCK_VOUT1
BUCK_VOUT2
GND_BUCK
-NCP_VNEG
NCP_C1P
-NCP_C1M
SPKR_DRVP
SPKR_DRVM
VDD_SPKDRV
GND_SPKDRV_1
GND_SPKDRV_2
VREG_L6_1V8
+5V0_SPK_BOOST
VREG_L6_1V8
20K
R6105
1u
C6107
VREG_L4_1V2
C6108
1u
C6101
0.1u
C6102
0.1u
+VPWR
C6106
0.1u
1u
C6103
VREG_S4_2P1
D6929
DNI
D6928
D6927
1800
FB6921
33
p
C6923
0.1u
C6922
MIC6921
6
5
4
3
2
1
OUT
G1
G2
G3
PWR
G4
R6921
0
MIC6920
6
5
4
3
2
1
OUT
G1
G2
G3
PWR
G4
D6926
DNI
D6925
D6924
FB6920
1800
33p
C6921
C6920
0.1u
R6920
0
10u
C4940
+VPWR
C4941
22u
VA681
0
VA681
1
C6811
33p
C6812
33p
82n
L6811
C6810
33p
L6810
82n
CN6810
2
1
C6924 DNI
L6701
51n
D10008
D10007
L6700
51n
ANT10003 TE_1_1H_C-CLIP
FEED
ANT10004 TE_1_1H_C-CLIP
FEED
R692
2
DNI
U6600
FSA5157L6X
4
3
5
2
6
1
S
B1
VCC
GND
A
B0
1u
L4940
FM_ANT
SLIMBUS_DATA
SLIMBUS_CLK
CODEC_INT
PMIC_AUDIO_REF_CLK
CDC_BOOST_5V_EN
CODEC_RESET_N
EAR_SENSE
EAR_MIC_JACK
EAR_MIC_JACK
HPH_REF
HPH_REF
HPH_REF
HPH_REF
MIC_IN3_P
MIC_IN3_P
LINE_OUT_IRRC
MIC_IN1_P
MIC_IN1_P
SPK_P
SPK_P
SPK_N
SPK_N
RCV_P
RCV_P
RCV_N
RCV_N
MIC_BIAS_1
MIC_BIAS_1
MIC_BIAS_1
MIC_IN3_N
MIC_IN3_N
MIC_IN3_N
MIC_IN1_N
MIC_IN1_N
MIC_IN1_N
HPH_L_OUT
HPH_L_OUT
HPH_R_OUT
HPH_R_OUT
MIC_IN2_N
MIC_IN2_N
MIC_IN2_N
EAR_SENSE_JACK
EAR_SENSE_JACK
MIC_BIAS_2
MIC_BIAS_2
DNI_131126 by JANG
DNI_131126 by JANG
Star route from C6104 to pin6 and pin12.
[ Layout ]
Please isolate PMIC_AUDIO_REF_CLK trace with GND to prevent spur noise issue.
[ Layout ]
Rev_0.4
< 6-6-1_Earjack >
GND Close to EarJack
Close to EARJACK
D6604 : Clampling 25V / 0.35pF
D6601-6603 : Clampling 12.5V / 15pF
D6600 : Clampling 3.3V / 6pF
U6600 BOM DNI
< 6-9-2_2MIC >
Main_MIC
SUB_MIC
GND Close to MIC
Rev_0.3
GND Close to MIC
Contact type
< 6-8-1_Receiver_Only > Rev_0.3
SPEAKER
DGMS
VALUE_CHANGE
1.0mm
1.0mm
connected to the main GND with dedicated vias.
2. Pin 55 should be connected to the GND side of C680 and directly
1. Pin 18, 23 and pin 40 should be connected to main GND directly.
MC-C00074-11 : For ESD Protection / Tuning points
Pin 18(GND) should have
LINE_OUT2
LINE_OUT1
a dedicated via to main GND.
Dedicate a ground island for the buck/NCP ground connections.
(DGMS Guide)
Rev_0.5
< 6-1-1-1_Codec_WCD9302 >
When USE) TVS devices's Working Voltage must be greater than the Path voltage
MC-C00074-11 : For ESD Protection / Tuning points
(DGMS Guide)
When USE) TVS devices's Working Voltage must be greater than the Path voltage
<4-9-1-2-1_5V_BOOST_TPS61256A_AUDIO_EXTERNAL>
Rev_0.4
You may subtract the external ESD components (The pins of HPH L/R, EAR P/M and SPK L/R)
Note: The WCD9302 ingetrates IEC ESD protection inernally. (8 kV contact and 15 kV air discharge)