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3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.1.1 General
• Integrated voice-band, audio-band and base-band analog front ends.
• Package:
– aQFN, 11.5x11.5x0.85 mm
– 0.47 mm pitch
– 260balls, 0.47mm pitch package
3.1.2 MCU Subsystem
• ARM7EJ-S 32-bit RISC processor
• High performance multi-layer AMBA bus
• Operating frequency 52/104MHz
• Dedicated DMA bus, 7DMA channels
• 144KB 0n-chip SRAM
• On-chip boot ROM for Factory Flash Programming
• Watchdog timer for system crash recovery
• 3 sets of General Purpose Timer
• Circuit Switch Data coprocessor
• Division coprocessor
3.1.3 External Memory Interface
• Supports up to 3 external devices
• Supports 16-bit memory components with maximum size of up to 64M Bytes for each bank
• Supports Flash and SRAM/PSRAM with Burst Mode
• Support legacy industry standard parallel LCD Interface
• Suppport multi-media companion chips with 8/16 bits data width
• Configurable driving strength for memory interface
3.1.4 User Interface
• 6-row x 7-column keypad control with hardware scanner
• Support multi key press for gaming
• SIM/USIM Controller with hardware T=0/T=1 protocol control
• Real Time Clock(RTC) operating with a separate power supply
• General Purpose I/Os (GPIOs)
• 1 set of Pulse Width Modulation(PWM) Output
• Alerter Output with Enhanced PWM or PDM
• Maximum 7 external interrupt lines
3.1.5 Security
• Support security key and 128bit chip unique ID