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Copyright © 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
6. CIRCUIT DIAGRAM
ANT5300
size 2x1.5
1
C5306
0.1u
1
2
1n
C5310
1
2
R5309
1.5K
2
1
RF_IN
VDD_RF/VCO
VDD_PLL/DIG
LDO_EN
BB_IB/_BB_QB
ADC_VDD
BB_CAP
XO_OUT
LNA_LOAD
LDO_OUT
XI
LDO_IN/VDDM3_3V
MIX_IND
HOST_INTB
XTAL_CAP
XO
RESETB
BCEB
TMODE
HPI_MODE
HA0/BADDR_0
HA1/BADDR_1
BB_I/BB_Q
GND_LDO
HD0/TS_SYNC/SPI_MISO/BDATA_0
HD1/TS_EN/SPI_MOSI/BDATA_1
HD2/TS_DATA/SPI_CS/BDATA_2
HD3/I2C_SDA/CPOL/BDATA_3
HD4/I2C_CLK/CPHASE/BDATA_4
HD5/BDATA_5
HD6/I2C_ID0/SPI_ID0/BDATA_6
HD7/TS_CLK/SPI_CLK/BDATA_7
BWEB
BRDB
GND_BB_1
GND_BB_2
GND_BB_3
GND_BB_4
GND_BB_5
GND_RF_1
GND_RF_2
GND_RF_3
GND_RF_4
GND_RF_5
GND_RF_6
GND_RF_7
GND_ADC_1
GND_ADC_2
U5300
FC8150
E3
E2
D3
C3
B3
D2
C2
B2
A2
F5
F4
E5
E4
D5
B6
B5
D7
F6
E7
G7
G6
C7
C6
B7
F2
B4
E6
D6
C5
D4
A5
A7
F3
G3
A6
A3
G5
G4
F1
B1
G2
F7
G1
C4
E1
D1
C1
A1
0.1u
C5305
1
2
0.1u
C5307
1
2
0.1u
C5302
1
2
0.1u
C5304
1
2
L5305
100n
2
1
1u
C5309
1
2
L5306
27n
2
1
C5303
10u
1
2
TP5302
1
TP5301
1
TP5304
1TP5300
1
+1V8_MTK_DTV
+1V8_MTK_DTV
C5300
DNI
1
2
L5302
22n
2
1
0.5p
C5311
1
2
IN
OUT
COUPLING1
COUPLING2
GND
FL5300
836.5MHz/897.5MHz
5
3
2
4
1
18n
L5307
2
1
18n
L5303
2
1
TP5305
1
TP5306
1
TP5307
1
100p
L5301
1
2
0
R5310
26M_DTV_CLK
1SEG_INT
1SEG_EN
1SEG_RESET_N
1SEG_SPI_CLK
1SEG_SPI_CS
1SEG_SPI_MISO
1SEG_SPI_MOSI
DTV Only
REV 1.0
<5-3-1-3_Broadcasting_ONE-SEG_FC8150>
13/09/02 breakid.jeong
D175f Model Ref.
C5301
1
2
DNI
L5304
2
1
22N
L5300
2
1
15N
D5300
2
1
EAH62233601