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LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
3.9. External memory interface
The MSM6280 device was designed to provide two distinct memory interfaces. EBI1 was
targeted for supporting high speed synchronous memory devices. EBI2 was targeted towards
supporting slower asynchronous devices such as LCD, NAND flash, SRAM, etc.
In addition, MSM6280 provide SD bus interface. KB770 supports Micro-SD using SD interface.
y
EBI1 Features
- 16 bit static and dynamic memory interface
- 32 bit dynamic memory interface
- 24 bits of address for static memory devices which can support up to 32MBytes
on each chip select
- Synchronous burst memories supported (burst NOR, burst PSRAM)
- Synchronous DRAM memories supported
- Byte addressable memory supporting 8 bit, 16 bit and 32 bit accesses
- Pseudo SRAM (PSRAM) memory support
y
EBI2 Features
- Support for asynchronous FLASH and SRAM(16bit & 8bit).
- Interface support for byte addressable 16bit devices (UB_N & LB_N signals).
- 2Mbytes of memory per chip select.
- Support for 8 bit/16bit wide NAND flash.
- Support for parallel LCD interfaces, port mapped of memory mapped(18 or 16 bit).
y
2Gb NAND(8bit) flash 1Gb SDRAM (32bit)
y
1-CS(Chip Select) are used.
y
The SD bus allows the dynamic configuration of the number of data line from 1 to 4 Bi-
directional data signal. After power up by default, the Device will use only DAT0. After
initialization, host can change the bus width.
30 ns
35 ns
15 ns
30 ns
Toshiba
SDRAM
Toshiba
FLASH
Interface Spec
Device
Part Name
Maker
Read Access Time
Write Access Time
Table 3.9 External memory interface
TYA000B800COGG
TYA000B800COGG
3.9. External memory interface
