LG GCC-4242N Service Manual Download Page 37

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FUNCTIONAL BLOCK DIAGRAM

Bank Select

CLK

ADD

LRAS

Address Register

Row Decoder

Sense AMP

Output Buffer

I/O Control

Col. Buffer

Row Buffer

Refresh Counter

LCBR

LCKE

LRAS

CLK

CKE

RAS

CAS

L(U)DQM

LCBR

LWE

LCAS

LWCBR

LDQM

LWE

LDQM

DQi

Data Input Register

Column Decoder

Latency & Burst Length

Programming Register

512 x 16

Timing Register

Pin Name

Input

Function

CLK

System Clock

Active on the positive going edge to sample all inputs.

Chip Select

Disables or enables device operation by masking or enabling all inputs except CLK, CKE
and L(U)DQM.

CKE

Clock Enable

Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior to new command.
Disable input buffers for power down in standby.

A0~A10/AP

Address

Row/column addresses are multiplexed on the same pins.
Row address : RA0~RA10, column address : CA0~CA7.

Bank Select Address

Selects bank to be activated during row address latch time.
Selects bank for read/write during column address latch time.

RAS

Row Address Strobe

Latches row addresses on the positive going edge of the CLK with RAS low.
Enables row access & precharge.

CAS

Column Address Strobe

Latches column addresses on the positive going edge fof the CLK with CAS low.
Enables column access.

Write Enable

Enable write operation and row precharge.
Latches data in starting from CAS, WE active.

L(U)DQM

Data Input/Output Mask

Make data output Hi-Z, tSHZ after the clock and masks the output.
Blocks data input when L(U)DQM active.

DQ0~15

Data Input/Output

Data inputs/outputs are multiplexed on the same pins.

VDD/VSS

Power Supply/Ground

Power and ground for the input buffers and the core logic.

VDDQ/VSSQ Data Output Power/Ground Isolated power supply and ground for the output buffers to provide inproved noise

immunity.

N.C/RFU

No Connection/

This pin is recommended to be left No Connection on the device.

Reserved for Future Use

•

Pin Function Description

Summary of Contents for GCC-4242N

Page 1: ...Slim CD RW DVD ROM Drive SERVICE MANUAL MODEL GCC 4242N P NO 3828HS1043B May 2004 Printed in Korea MODEL GCC 4242N website http biz LGEservice com e mail http www LGEservice com techsup html ...

Page 2: ... Lead in Area 16 8 Function of PCA and PMA area 17 9 OPC and ROPC 17 10 Writing Process of DISC 18 DESCRIPTION OF DATA PROCESSING 19 22 1 Data Processing Flow 19 2 Copy Protection and Regional Code Management Block 20 3 About Prevention the DVD ROM from to be copy 21 4 About the DVD ROM Regional Code 22 INTERNAL STRUCTURE OF THE PICK UP 23 25 1 Inner Circuit of the PICK UP 23 2 Signal detection of...

Page 3: ...xPCAV 24x Max CAV 3 Read speed CD R RW ROM 24x 24x 24x Max CAV CD DA DAE 20x Max CAV DVD R RW ROM 4x 4x 8x Max CAV DVD R RW 4 7GB 4x 4x Max CAV DVD Video 8x Max CAV DVD RAM 2 6G 4 7G 2x ZCLV 4 Sustained Transfer rate CD ROM 3 600 kB s 24x Max DVD ROM 11 08 Mbytes s 8x Max 5 Burst Transfer rate Ultra DMA Mode2 DMA MW Mode2 PIO Mode4 6 Support CD TEXT read write 5 Audio 1 Outputs 16 bit digital data...

Page 4: ... CD ROM XA CD Audio Mixed Mode Audio and Data Combined CD I Video CD CD Plus CD Extra CD Text Applied Format depend on Authoring Tool Writing Method Disc at once DAO Session at once SAO Track at once TAO Variable packet writing Fixed packet writing Multi session Embedded Running OPC Buffer Under run Prevention 4 Cache memory 2 MB 5 Disc diameter 120 mm 80mm 6 Data capacity User Data Block DVD ROM ...

Page 5: ...16PCAV 24xMAX CAV CD RW Normal Disc 4xCLV High speed Disc 4x 10xCLV Ultra speed Disc 10xCLV 10 16xPCAV 24xMAX CAV Rotational Speed CD R RW 4xCLV Approx 800 2 020 r min 10xCLV Approx 2 000 5050 r min 24xMAX CAV Approx 4 860 5 200 r min 2 Data Transfer Rate Sustained Transfer Rate Read DVD ROM Single Layer 11 08 Mbytes s 8x Max Dual Layer 11 08 Mbytes s 8x Max DVD R 3 95GB 5 54 Mbytes s 4x Max 4 7GB...

Page 6: ...ng time or 10 000 POH Assumption Used in a normal office environment 6 Power Requirements 1 Source Voltage 5V 5 Ripple Less than 100mVp p 2 Current Stand By Sleep 30 mA typical Continuous Read 700 mA typical CD 24x Max CAV 650 mA typical DVD 8x Max CAV Continuous Write 800 mA typical CD R 24x Write Seek 1 0A typical 1 5A Max 24x Max CAV Spin UP Spindle motor start up 1 0A typical 1 8A Max 24x Max ...

Page 7: ...L A Remove the Front Panel The Front Panel is a snap on type B At this time be careful not to damage the 3 hooks a of the it See fig 3 C Release 4 screws C and remove the Cover Bottom 3 4 BASE PICK UP A Remove the FPC Cable At this time the FPC connector must be pulled in the direction of Front carefully B Remove the Base Pick up 4 1 A A A B B B B 2 4 2 3 C C C C CABINET 2 HOOKS HOOKS a FRONT PANE...

Page 8: ...8 PBM00 MAIN C B A A B C D 1 2 3 4 5 436 436 436 001 012 009 462 463 011 013 014 462 462 462 462 436 436 437 437 016 005 015 450 004 003 A02 A01 A00 436 EXPLODED VIEW ...

Page 9: ...hanged conditions of disc and change in operating temperature Jitter The 16 value of the time variation between leading and trailing edges of a specific I3 I11 pit or land as measured by Time Interval Analysis Deviation The difference between a fixed value of Pit length and Land length TOC Table Of Contents in the Lead in Area the subcode Q channel contains information about the Tracks on the disc...

Page 10: ...Land Track pitch p Radial Direction Iw A O a a Groove Land Radial Error Signal The Groove wobble Average center Actual center CD ROM CD R CD RW Standard Yellow Book Orange Book II Orange Book III Record Not available Write once Re writable I 11 Itop 0 6 0 6 0 55 M11 0 70 HF Modulation Write Laser Power mW 10 30 mW 6 25 mW Read Laser Power mW 0 5 mW 0 7 mW 1 0 mW Jitter 35 nsec 35 nsec 35 nsec Refl...

Page 11: ...n the disc It is so called WORM Write Once Read Many CD It is composed of polycarbonate layer Organic dye layer Reflective layer and Protective layer Gold Silver Reflective layer is used to enhance the reflectivity According to the kinds of Organic dye layer it is divided by Green CD Gold CD Blue CD Laser Wavelength 780 nm Laser Power read 0 7 mW Recording Power 4x 10 15mW 8x 14 20mW 12x 15 30mW 1...

Page 12: ... reading is enabled by the difference of reflectivity It is possible to overwrite about 1000 times Laser Wavelength 780 nm Laser Power Read 1 0mW Recording Power Erase 4 18mW Write 6 45mW When disc rewriting new data is overwritten previously recorded data Polycarbonate layer has a Pre Groove which make a track Lens H D Beam Spot Focusing Lens Laser Spot at Constant Read Intensity Reflected Light ...

Page 13: ...Spot Recorded Mark Reflected Light Signal Reflected Light Signal Below ORP Mark Too Short At Optimum Record Power ORP Above ORP Mark Too Long Time 6 Writing process of CD RW Disc Write Power Erase Power Read Power Groove Crystal Amorphous Amorphous Recorded state lower reflectivity Melting quenching Heating gradual cooling Crystal phase Erased state higher reflectivity ...

Page 14: ...Area Lead out Area Center hole Clamping and Label Area Information Area PCA PMA Test Area Count Area Diameter 15 mm Diameter 45 mm Diameter 120 mm Unrecorded Disc Tsl 00 35 65 Tsl 00 15 05 Tsl 00 13 25 Tsl 99 59 74 00 00 00 in out Test Area for performing OPC procedures Count Area to find the usable area immediately in T A Tsl start time of the Lead in Area as encoded in ATIP PMA Program Memory Ar...

Page 15: ...ad_In area so that general Driver can read it Because PCA and PMA area exist before Lead In area General CD Player or CD ROM Drive can t read these areas 9 OPC and ROPC 1 OPC Optimum Power Control This is the first step of writing process because CD writer has its own laser power value and media have different writing characteristics This is determined by the Writing characteristic speed temperatu...

Page 16: ...lose Reference B level value c Normalization of B level is used to eliminate the effect of reflectivity fluctuation The reflected B level value is normalized by the disc reflectivity itself 18 CD R RW Media Write Strategy Determination PCA Test Area Program Area PMA Area Lead In Area Lead out Area OPC PCA Count Area ROPC Recording Capacity of CD R RW 74Minute Recording media 2048 Byte Sector X 75 ...

Page 17: ...ice EFM demodulator CiRC error correction Audio DAC C3 decoder Buffer Memory controller CSS controller Atapi interface control Data PLL Servo ADC Focus tracking control output Sled control output CAV Spindle control P up Unit IC101 AN22107A RF AMP CD DVD IC201 MN103S63G TE CSO GEN FE GEN FLASH ROM DRAM IC602 IC601 DRAM ...

Page 18: ...e regional code and plays title in the case of allowed regional code only 2 Management of DVD Disc for the scrambled of data 1 DVD ROM and DVD player of host generate the KEY 1 respectively transfer to opposite part the KEY 2 is received recognizes the data transfer or not with this value and generates the bus key encoded the data 2 Encoded Disc Key and Title Key host is transfer with the bus Key ...

Page 19: ...decoder generates the challenge key 10 Byte and transfers to drive The board and drive generate key 1 5Byte with the challenge key respectively Of course the Algorithm generating the key 1 is not known 3 Compare with the generated key 1 if it corresponds each other the first step of authentication is completed This is a course to identify the MPEG 2 decoder with a drive 4 The second step of authen...

Page 20: ...M PLW PNG NZL AUS 4 The disc has the regional code of 8 bit Example The disc manufactured in the U S A has the number one Transfer to MPEG 2 decoder reading the regional code If the board is setting to the regional code 1 for the U S A Check the received regional code to number 1 all or not transfer the data to VGA card in accordance with only a case among the three case Regional code Receiving da...

Page 21: ...45 DVD HFM 9 8 10 Vcc1 W2 7 W1 6 INW2 5 INW1 4 Fadj 3 INE 2 INR 1 IR GND VA VC Vcc Vref VE G HFM 11 ENBL 12 Aad 13 GND 14 IOUT 15 Vcc2 16 E R4 2 2k R3 C3 2200p R1 6 6k R1 6 6k VF1 680 L3 R7 15k C13 1000p C11 1 0u C12 1000p C15 0 1u DVD Hologram GHSD4086A L6 SZ1005K221 C14 0 1u VR2 22k L4 SZ1006K221 L5 SZ1006K221 R8 3 3k SZ1005K221 From Monitor CF0069AH HF IC TC9384FU C5 1 0u C10 0 1u C8 0 1u R9 R6...

Page 22: ...EIC output signal A 21 CD VB CD OEIC output signal B 22 CD SW Gain changeover switch for CD OEIC output signals 23 CD VD CD OEIC output signal D 24 CD VF H CD OEIC output signal F H 25 CD VE G CD OEIC output signal E G 26 TEMP GND Ground connection for Thermistor 27 TEMP Thermistor 28 FM Vcc Power supply for Front Monitor 5 29 FM Vref VrefReference voltage input for Front Monitor 2 5V 30 FM GND GN...

Page 23: ...ethod A D B C k x F H E G This signal is generated in RF IC IC101 AN22107A and controls the pick up s left and right shift to find to track on Disc 3 RF Signal A B C D This signal is converted to DATA signal in DSP IC IC201 MN103S63G 25 Pick Up module Photo Diode Tracking Focusing Infrared Iaser k F H E G A D B C A D B C k F H E G Offset TE Tp Sub2 Main Tp 2 Sub1 Track Center F E D C A B H G ...

Page 24: ...2 10 VHALF 11 VR06 12 LPC1 13 LPC0 14 EDRV 15 FPDMN 16 FPDMP 17 GND3 18 RDRVN2 19 RDRVN1 20 RDRV 21 RREFDET 22 WDRVN2 23 WDRVN1 24 WDRV 25 WREFDET 76 WBL 50 NC2 49 VCC5 48 BMC 47 PKC 46 RFENV 45 CDEFECT 44 GND2 41 OFTR 40 BDO 39 VDD 38 NC1 37 SCK 36 SEN 35 STDIO 34 TOK 33 XWTGT 32 ADCLR 31 ADCK 30 VSS 29 XSTANBY 28 VFOSHORT RAPC 27 WAPC 26 VCC3 43 ROPCSH2 DTRD 42 ROPCSH1 IDGT 77 SCFCLK 78 NC4 79 W...

Page 25: ...41 OFTR O OFTR TC output 42 ROPCSH1 I ROPC1 sample hold timing input IDGT 43 ROPCSH2 I ROPC2 sample hold timing input DTRD 44 GND2 PS GND for RF 5V 45 CDEFECT DEFECT envelope detection filter 46 RFENV O RF envelope output 47 PKC MSC Peak envelope detection filter 48 BMC MSC Bottom envelope detection filter No Name I O Funtion 49 VCC5 PS Power supply CMOS I F 3 3V 50 NC2 Non connection 51 DFLTOP O ...

Page 26: ...f w and 8 Kbyte microcode and 2 Mbit DRAM 32 bit CPU core BCU DRAMC DMA 1 Mbit DRAM OnChip Debug Data memory 6 Kbyte f w 4 Kbyte microcode Instruction memory 128 Kbytes CGEN MODE WDT 16 bit timerx6 f w timerx2 microcode SYSTEM I F INTC General purpose I O Serial interface HOST I F MPEG I F ECC DMA I F ATAPI General purpose I O bus SERVO IO Core1 IO SERVO core Core2 RAM CIRC DVD ROM Formatter CD PR...

Page 27: ...55 RVI FADR15 27 28 165 154 VHALF DRAMVDD15 28 29 164 153 NARF VOUT 29 30 163 152 ARF DRAMVDD33 30 31 162 151 AVSSB DRAMVSS 31 32 161 150 PLFLT1 _VSS NC 33 160 149 PLFLT2 TxD 32 34 159 148 AVSSC SCLOCK 33 35 158 147 RFDIF NRST 34 36 157 146 CSLFLT SDATA 35 37 156 145 WBLIN RxD 36 38 155 144 AVDDC P2 37 39 154 143 TRCRS P3 38 40 153 142 VCOF P4 39 41 152 141 AVDDD P5 40 42 151 140 LOUT P6 41 43 150...

Page 28: ...ut to general purpose port flash 16 16 N1 P8 FADR18 CPUADR17 I I O Flash Address output to general purpose port flash 17 17 N4 P17 FADR19 I O Flash Address output to general purpose port flash 18 18 P3 NWE NWR I O Flash Write signal output to flash 19 19 K5 FADR9 CPUADR9 I O Flash Address output to flash 20 20 M2 FADR10 CPUADR10 I O Flash Address output to flash 21 NC NC _VDD3 Power supply VDD 3 3...

Page 29: ...NC _VSS GND VSS 45 42 F3 DRV4 I O Misc General purpose port 46 43 G1 DRV5 I O Misc General purpose port 47 44 E3 DRV6 I O Misc General purpose port 48 45 G2 DRV7 I O Misc General purpose port 49 46 VDD3 Power supply VDD 3 3 V 50 47 H4 MDQ0 I O DRAM SDRAM data 51 48 E6 MDQ15 I O DRAM SDRAM data 52 49 G4 MDQ1 I O DRAM SDRAM data 53 50 D3 MDQ14 I O DRAM SDRAM data 54 51 F2 MDQ2 I O DRAM SDRAM data 55...

Page 30: ... address 88 82 D8 MA8 O DRAM SDRAM address 89 83 A9 MA0 O DRAM SDRAM address 90 84 B9 MA7 O DRAM SDRAM address 91 85 VSS GND VSS 92 86 VDD15 Power supply VDD 1 5 V 93 NC NC _DRAMVDD15 Power supply DRAM Power supply 1 5 V 94 NC NC _DRAMVSS GND VSS for DRAM use 95 87 VDD3 Power supply VDD 3 3 V 96 88 A10 MA1 O DRAM SDRAM address 97 89 E9 MA6 O DRAM SDRAM address 98 90 A11 MA2 O DRAM SDRAM address 99...

Page 31: ... B15 SCFCK O EFEP Reference clock for wobble signal extraction BPF use 123 115 VSS GND VSS 124 116 VDD3 Power supply VDD 3 3 V 125 117 A16 SH1 IDGT O EFEP General purpose S H 1 ROPC1 CAPA block selection signal 126 118 B16 SH2 DTRD O EFEP General purpose S H 2 ROPC2 Data block frequency control selection signal 127 NC NC 0 128 NC NC 0 129 119 C18 SH3 VFOSHORT O EFEP General purpose S H 3 RAPC VFO ...

Page 32: ...apacitor for CPDET use 158 147 H14 RFDIF I FEP RF input for CPDET use 159 148 L18 A V SSC GND VSS for SYS PLL and JF PLL use 160 149 G15 PLFLT2 I Ext Capacitor 2 for PLL use 161 150 J17 PLFLT1 I Ext Capacitor 1 for PLL use 162 151 H15 A V SSB GND VSS for DSL and data PLL use 163 152 K15 ARF I FEP Equivalent RF input 164 153 M15 NARF I FEP Equivalent RF input 165 154 K17 VHALF I FEP Reference 1 65 ...

Page 33: ...isc External interrupt pin Internal monitoring signal 193 NC NC 0 194 182 V16 DMARQ O HOST DMA request output to ATAPI host 195 183 U15 NIOWR I O HOST ATAPI host write signal input 196 184 V15 NIORD I O HOST ATAPI host read signal input 197 185 U14 IORDY O HOST Ready output to ATAPI host 198 186 VDD3 Power supply VDD 3 3 V 199 187 VSS GND VSS 200 188 P13 NDMACK I HOST ATAPI host DMA acknowledge in...

Page 34: ...Power supply 5 V reference power supply 235 NC NC _VDD3 Power supply VDD 3 3 V 236 NC NC _VSS GND VSS 237 223 V7 P0 SERIAL I O Misc General purpose port 238 224 P8 P1 SERIAL I O Misc General purpose port 239 225 U7 FADR16 CPUADR16 I O Flash Address output to flash 240 226 T7 FDT15 P35 I O Flash Data I O with Flash General purpose port 241 227 V8 FDT7 CPUDT7 I O Flash Data I O with Flash 242 228 R4...

Page 35: ...a I O with Flash 254 240 U4 FDT8 P28 I O Flash Data I O with Flash General purpose port 255 241 V3 FDT0 CPUDT0 I O Flash Data I O with Flash 256 NC NC 0 1 When using the on board debugger Dwire pin SCLOCK and SDATA settings are required 2 The iRAM model has NC pins connected to power supply or the GND No NC pins of the iROM model are connected to any internal circuit or other pin ...

Page 36: ...Q8 SS Overview The M12L16161A is 16 777 216 bits synchronous high data rate Dynamic RAM organized as 2x 524 288 words by 16 bits fabricated with high performance CMOS technology Synchronous design allows precise cycle control with the use of system clock I O transactions are possible on every clock cycle Range for operating frequencies programmable burst length and programmable latencies allow the...

Page 37: ... CA0 CA7 BA Bank Select Address Selects bank to be activated during row address latch time Selects bank for read write during column address latch time RAS Row Address Strobe Latches row addresses on the positive going edge of the CLK with RAS low Enables row access precharge CAS Column Address Strobe Latches column addresses on the positive going edge fof the CLK with CAS low Enables column acces...

Page 38: ...ircuit electrical erasure and programming The MX29LV400T B uses a command register to manage this functionality The command register allows for 100 TTL level control inputs and fixed power supply levels during erase and programming while maintaining maximum EPROM compatibility MXIC Flash technology reliably stores memory contents even after 100 000 erase and program cycles The MXIC cell is designe...

Page 39: ...9 A8 A10 A11 Q7 Q14 Q13 Q6 4 WE RESET NC NC Q5 Q12 Vcc Q4 3 RY BY NC NC NC Q2 Q10 Q11 Q3 2 A7 A17 A6 A5 Q0 Q8 Q9 Q1 1 A3 A4 A2A 1A 0C E OE GND 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC RY BY A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 RESET WE A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE GND Q15 A 1 Q7 ...

Page 40: ...check Visual check Go to visual check Lens cleaning Connector lock Lens dirty The soldering state check on PWB NG NG OK OK OK OK 42 Connector lock NG Soldering correction Go to each items check NG In that case of a READ WRITE problem go to monjc3 check CND ...

Page 41: ...MD Set Audio heatrun mode PIC 10 ave PIE 1 ave PID 95 DVD RAM Return MD and Change Main PWB Set Audio heatrun mode PIC 10 ave PIE 1 ave PID 95 DVD RAM Skew adj NG P U NG sub RF signal is too small MD is NG Main PWB is NG FPC cable is NG NO NO YES NO NO YES NO YES YES CD DVD RAM CRAMp 012Bh 029C or FD64 4D balance too bad NO YES OK ...

Page 42: ...down left right Enter OK Enter No ESC Enter Audio heatrun refer to above set to Address 0602 0005 radial tilt center 7FF5 radial tilt inner most 001 to 7FF 8005 radial tilt outer most FFF to 800 Address 0602 is write only register can not read Initial disc distinction monjc3 monjc3 Enter F12 Specl F10 D add key board arrow button up down DATA mRAM Address 00000032 D Length 02 N of DATA 01 Bank 00 ...

Page 43: ...disc OK After eject tray Insert blank CD R and check rotation Does Disc rotate continuously and the drive recognize the disc OK After eject tray Insert DVD ROM DVD RAM and check rotation OK Go to Sled Motor Servo is abnormal Go to Focus Servo is unstable NG Go to LD Control is abnormal NG Go to Recognition Fail Case 1 CD ROM Fail NG Go to Recognition Fail Case 1 Blank CD R RW Fail NG If DVD ROM di...

Page 44: ... signal is usually GND level Check soldering around Tray motor and connection condition Eject button Check Replace Tray Motor OK NG OK OK OK OK OK NG OK Are each FPC connection OK NG NG Is TL354 5V OK OK NG Replace LED Check soldering of Q304 and R311 Check soldering of IC201 OK Replace Eject SW Check soldering of IC201 A14 and R217 NG Repair soldering of NG parts NG Repair soldering of R259 R263 ...

Page 45: ...e check Repair soldering of NG parts CD PG301 13 15pin TL313 315 17 19pin TL317 19 DVD PG301 22 24pin TL322 324 26 28pin TL326 328 e e h h h h h h e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e g g g g g g Replace Unit Mecha and Execute LD Calibration OK Replace IC101 Repair...

Page 46: ...oltage of TL347 1 65V 4 Check insertion or damage of Main FPC Is Focus Drvie normal TL343 Replace Unit Mecha and Execute LD Calibration NG OK OK Is Focus Drive normal IC201 side of R250 NG NG Check LPF R250 C250 Repair Charge NG parts Replace IC201 OK Focus Drive Check ...

Page 47: ... Out put is IC101 10pin Replace IC201 Replace Unit Mecha and Execute LD calibration OK Is SPD signal normal TL346 1 Check soldering of PG301 2 Check insertion and damage of Main FPC Check LPF R226 R227 C216 Check soldering of IC201 OK OK OK NG NG NG OK OK Repair soldering of NG parts NG Repair Change NG parts Repair Change NG parts NG Disc Motor does not rotate ...

Page 48: ...L signal normal TL117 NG NG Is SCCLK signal normal IC101 77 NG NG NG NG NG OK Check HPF C214 R223 Check soldering of C132 C136 C144 NG Check signal IC201 side of R223 OK Check soldering of IC201 OK OK NG Replace Unit Mecha and Execute LD calibration Replace IC201 Replace IC101 Change Re soldering NG parts 1 Check soldering of PG301 2 Check insertion and damage of Main FPC OK Check soldering of IC1...

Page 49: ...g of PG101 2 Check voltage of TL334 338 5V 3 Check voltage of TL322 2 1V 4 Check insertion or damage of Main FPC Change Re soldering NG parts Change Re soldering NG parts OK OK Replace Unit Mecha and Execute LD Calibration OK OK 1 Check Soldering of PG301 2 Check voltage of TL334 338 5V 3 Check voltage of TL322 2 1V 4 Check insertion or damage of Main FPC Replace Unit Mecha and Execute LD Calibrat...

Page 50: ...sn t move to inner position NG Is Control signal normal R232 R233 of IC201 NG 1 Check 3 3V 5V 2 Check soldering of IC201 OK Replace Unit Mecha and Execute LD Calibration Check LPF R232 R233 C260 C261 Replace IC201 OK OK OK sled control signal when closed a tray from the pick up outter sled control signal when closed a tray from the pick up inner ...

Page 51: ...26 R227 C216 OK Replace Unit Mecha and Execute LD Calibration Replace Unit Mecha and Execute LD Calibration NG NG OK OK NO YES CD R CD RW Is WBL signal normal TL117 NG Is SCFCLK signal normal IC101 77 NG OK Check HPF C214 R233 Check soldering of C132 C136 C144 NG Check IC201 B15 NG Check soldering of IC201 OK Replace IC201 Replace IC101 OK Check soldering of IC101 OK ...

Page 52: ...e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e g g g g g g input is Measured value x100 e e h h h h h h e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e e g g g g g g input is Measured value x1000 e e h h h h h h e e e e e e e e e e e e e e e e e e e e e e e e e e e e...

Page 53: ... choose 2 Read Power Check Input value of the power meter by µW For example Measured power is 2 55 µW Input value is 2550 Replace the P U and execute LD Power calibration Replace the FEP and execute LD Power calibration Replace the P U and execute LD Power calibration Replace the FEP and execute LD Power calibration No No No FPD level 150 over No No Yes Yes Yes Yes NG 1 NG 4 NG 3 NG 2 A ...

Page 54: ...ion Replace the FEP and execute LD Power calibration Replace the P U and execute LD Power calibration Replace the P U and execute LD Power calibration Replace the FEP and execute LD Power calibration No No FPD level 150 over No No Yes Yes Yes Yes NG1 Replace the P U and execute LD Power calibration Yes NG3 NG2 NG4 NG5 Input value of the power meter by 10µW For example Measured power is 15 55 mW In...

Page 55: ...g Servo operate normally OK NG Check Pickup RF signal TL313 315 317 was 200 800mVpp Go to Tracking Servo is unstable NG 1 Check Soldering of PG301 2 Check voltage of TL311 5V 3 Check voltage of TL320 2 5V 4 Check voltage of TL332 2 1 5 Check insertion or damage of Main FPC OK Is there WBL TL117 signal Is there WBLI IC201B14 signal Recognition Fail Case1 Blank CD R RW Fail Replace IC101 Replace IC2...

Page 56: ...OK Check i Soldering of PG301 ii Insertion or damage of Main FPC Replace the Pickup unit NG Is there RF signal at PG301 Pin25 TL325 OK Check i Voltage of TL334 5V ii Voltage of TL332 2 1V iii Dumping Reg R131 R134 RA103 iv Soldering of IC101 v Voltage of Vhalf Replace the IC101 NG Check ARF waveform IC101 Pin51 is 400 800mVpp TL114 OK NG Check after replacing Pickup unit Is it OK Replace the Q303 ...

Page 57: ... OK Check i Soldering of PG301 ii Insertion or damage of Main FPC Replace the Pickup unit NG Is there RF signal at PG301 Pin25 TL325 OK Check i Voltage of TL334 5V ii Voltage of TL332 2 1V iii Dumping Reg R131 R136 RA103 iv Soldering of IC101 V Voltage of Vhalf Replace the IC101 NG Check ARF waveform IC101 Pin51 is 400 800mVpp TL114 OK NG Check after replacing Pickup unit is it OK Replace the Q303...

Page 58: ...n the Writing Tool Nero Burning ROM Run the Writing with Tool Nero Burning ROM Eject Tray Go to LD Check Write Power Check Replace IC201 Check and replace IC101 IC201 Yes No No No No Is the written file read normally Is the re written file read normally Is RAPC input signal Pulse when CD R writing IC101 pin 28 Yes Yes Yes ...

Page 59: ...se new CD R disc If CD RW disc use new CD RW disc or erase the disc when necessary No Remove the Dust Fingerprint and if the disc has log width Scratch change it No Use LG bundle Software Write Tool Version NERO Buning ROM No Eject Disc Go to Writing Part Check No Check the Media CD R or CD RW Finalized Disc Yes Does the disc have any Dust Scratch Fingerprint Yes Is the write Tool version supporte...

Page 60: ...201side OK Check soldering of R401 R405 and C401 C404 OK Check soldering of IC201 Check soldering and value of R265 NG Is IQ402 Base High level OK Q402 is mute control transistor Q402 Corector hight level is audio mute on it low level is mute off Check soldering of Q402 Replace Q402 Replace Q401 NG Is Q402 Corector Low level OK Check Soldering of Q401 NG ...

Page 61: ...SystemController Audio Mute Circuit H O S T 16 93MHz Optical Pick up HOP U601T Include 2MB DRAM SLED Stepping Motor FCS TRK TILT Spindle Motor Writing Strategy S H Timing RF Wobble Servo Signal Line Out L R Address Data Stepping 5V GND 3 3V Reg 1 5V Reg 1 5V 3 3V 5V GND MN103S63G AN22107A MN103S63G AN22107A MN103S63G BH6590KU Others Tray Motor SDRAM Address Data 63 Block Diagram Whole Block Diagra...

Page 62: ...6559FV IC101 FEP AN22107A IC201 DSP MN103S63G TH501 TH501 IC1 6 ch Driver BH6590KU 5V D5V P5V DM PCB 1 5V A3 3V D3 3V Pick Up HOP U601T IC601 SDRAM EM636165 M12L16161A IC602 FLASH SST39VF400A MX29LV400T IC301 DAC BH2220FVM 64 Power Supply Chart ...

Page 63: ...11 R254 PLMUTE IC201 MN103S63G PG301 EJECT PLMUTE SW302 SW301 LED CN4 CN2 EJ Assy LED PLMUTE EJECT LED Q304 TL353 TL351 TL354 V7 A14 T17 T16 P18 5V 53 51 54 2 4 5 1 4 5 2 R260 R259 Plunger coil R217 58 19 IC1 BH6590KU 2 1 65 Tray Control Diagram ...

Page 64: ... LE MATRIX 82 83 97 98 Tracking Error Generator 82 85 95 96 Focus Error Generator All Sum Error Generator Focus Servo On Detect AS Lens Position Error Generator CD AIN BIN DVD TR3 TR4 CD CIN FIN Vref1 2 2V IN3 CNF3 VO3R VO3F IC1 BH6590KU CN3 R5 C9 R8 TILTDRV TD FD R6 R7 R16 C25 IN2 CNF2 IN4 VO2F VO2R RDSL FDSL AF AF TR TR TILT TILT CN3 5V 11 12 6 5 16 15 6 5 4 3 2 1 59 55 56 54 57 12 11 10 VHALF 8...

Page 65: ...52 TL347 29 28 27 26 25 24 30 35 37 38 40 31 62 32 8 3 9 5V 5V 46 52 FG E12 B13 47 5V B14 B15 165 5V 3 3V JLINE JLINE R116 R235 H16 Vref CLV Control JLINE Clock Gen CAV Control 3 Phase Bridge Drive Hall Amp FG Gen 21 SPCNF C12 42 R4 SPRNF2 R218 41 34 U W VHALF 76 77 5V 3 3V 10 67 84 85 CIN DIN S H BPF AGC HPF Data Slice AGC 73 74 70 72 69 C135 C136 C132 C134 C131 C130 64 VREF 36 38 17 19 67 Disc M...

Page 66: ...5 IN6 44 VO5F VO6F VO5R VO6R A B A B IC201 MN103S63G PG301 CN4 IC1 BH6590KU CN1 TL349 TL350 43 48 47 61 60 5 6 49 8 VHALF Vref E13 F16 50 49 47 VHALF 1 5 2 4 Stepping Motor D A Conv 5V 5V 5V 5V PWM Drive PWM Drive C260 C261 36 38 17 19 68 Sled Motor Control Diagram ...

Page 67: ...332 57 R113 C123 C124 RFINP RFINN 54 55 C122 C121 C120 53 Data Slice PLL JLINE CIRC FORMATTER VHALF BDO DSLF1 C242 PLFLT2 C234 PLFLT1 C235 160 161 165 169 117 10 VHALF VREF21 90 AGCO AGCG DCFLT 5V 3 3V 5V 3 3V 1 5V 40 BDO 153 VCOF R238 C227 C228 168 DSLF2 C241 R245 D A Converter IC301 BH2220FVM 15 17 14 13 83 84 82 85 RA112 BIN AIN DIN CIN CD VA CD VB CD VD CD VC 69 Data Read Signal Flow Diagram ...

Page 68: ... 3V 1 8V 21 FM 15 1 3 RDRV IIN3 IIN2 20 24 14 4 6 CDLDON OUTEN2 OUTEN3 C18 D18 RAPC WAPC 28 27 B11 C14 B12 C10 NWGATE 33 S H DAC ROPC1 ROPC2 42 43 RAPC WAPC NWGATE CDLDON OUTEN2 OUTEN3 A 16 B16 ROPC1 ROPC2 WSH SSH WSH SSH 79 80 E18 C17 S H S H RF 13 19 18 15 17 16 NWGATE 70 Write Signal Flow Diagram ...

Page 69: ... Main PCB ROUT LOUT C402 C401 IC201 MN103S63G R401 R402 Q402 C403 C404 R403 R404 R264 Q401 ROUT LOUT GND J16 F17 A13 5V 2 1 3 71 Audio Circuit ...

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