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Copyright © 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
6. CIRCUIT DIAGRAM
DNI
C182
C183
DNI
C181
DNI
C161
2.7n
DNI
C179
L135
1.5n
100p
C177
100p
C176
L113
DNI
DNI
C163
6.8p
C162
L115
22n
L129
8.2n
2
1
L117
DNI
C138
100p
C164
33p
1
2
C166
8.2n
2
1
L128
2.7n
DNI
L126
C128
22u
C127
1n
SW101
4
1
3
2
G1
G2
ANT
G3
C152
100p
C159
DNI
100p
C157
DNI
C180
900MHz
FL104
5
6
4
3
CTL1
GND
PORT
3
PORT2
PORT
1
CTL2
C153
100p
1
2
C106
39p
10p
C107
C104
10p
C102
10p
10p
C101
U102
16
15
14
13
12
11
10
17
9
8
7
6
4
3
28
1
44
43
42
41
40
39
38
37
36
35
32
33
34
24
23
22
29
30
31
18
21
25
20
26
19
27
5
2 GND2
GND5
GND11
TRX1
AN
T
TRX2
GND1
0
TRX3
VRAMP
PGND3
PGND2
PGND1
TRX4
TRX5
TRX6
PGND6
PGND5
PGND4
PGND7 PGND8 PGND9
PGND10
PGND11
PGND12
PGND13
PGND14
PGND15
PGND16
GND1
GND12
GND3
GND4
GND6
GND7
GND8
TX_HB_I
N
TXEN
TX_LB_IN BS2 BS1 VBAT
T
VC
C
GND9
MODE
U101
1
B1
C2
D1
E2
F1
G2
H1
J2
K1
L2
M1
N2
P1
R2
T1
E18
D17
C18
B17
B13
A12
B11
A10
B9
A8
B7
A6
B5
A4
B3
A2
U16
V17
V15
U14
V13
U12
V11
U10
V9
U8
V7
U6
V5
U4
V3
U2
A1
4
B1
5
A1
6
F1
7
G1
8
H17
J1
8
K1
7
L18
M1
7
N18
P1
7
R18
T1
7
U18
GND4
NC
1
NC2 NC3
VDD_28a VSUP3
GND5
TX_LB1 TX_LB2
TX_HB1 TX_HB2 TX_HB3
GND6 GND7 GND8
LNA1N
LNA1P
LNA2N
LNA2P
LNA3N
LNA3P
LNA4N
LNA4P
LNA5N
LNA5P
LNA6N
LNA6P
LNA7N
LNA7P
LNA8N
LNA8P
REFCLK1
REFCLK2
REFCLK3
VDDXO
NC4
XO2
XO1/REFIN
VTUNE
CLK_MODE
VSUP2b
GND1
PDET
TX_IN
TX_IP
TX_QN
TX_QP
GND3
RX_BBI
P
RX_BBI
N
RX_BBQ
P
RX_BBQ
N
VSUP1 VDD_18
VSUP2
a
VDD_28b
CLK
DATA
0
DATA
1
VINT
EN
GND2
PGND
C117 100p
1u
C108
C112
1n
1n
C114
C126
6.8p
C118
0.1u
L102
8.2n
1.2n
L106
1u
C124
C119
1u
C109
1u
C123
1u
C103
1u
PT101
100K
26MHz
X101
1XXA26000FTA
VCONT
1
VCC
4
GND
2
OUT
3
39K
R106
215K
R107
C142
DNI
C143
0.1u
FL103
881.5MHz
7
5
8
4
9
2
3
1
6
ANT
RX1
TX
GND1
GND5
GND2
RX2
GND3
GND4
1842.5MHz
FL101
4
5
1
3
2
G1 O1
IN
G2 O2
C133
100n
C141
5.6n
C115 100p
L101
1.2n
100p
C165
L122
5.6n
C150
18n
L134
15p
C140
12p
C137 100p
L118
0.5p
C111
0.5p
L108
100n
DNI
L130
100p
C172
L104
2.2n
L105
5.6n
100p
C122
DNI
L120
DNI
C125
C160
8.2p
DNI
C130
L110
12n
L112
12n
1K
R105
R104
1K
R103
1K
R102 1K
C113 100p
L123
DNI
C178
DNI
2.7n
C149
L133
6.8n
L131
33n
L132 3.9n
C171 100p
L119
33n
C148
2.7n
L121
6p
C158
100n
U103
15
13
14
10
5
6
4
12
7
3
8
11
1
9
2
RFIN_LB
GND1
VEN_LB
RFOUT_HB
CPL_OUT
VBATT
VEN_HB
VCC
RFIN_HB
VMODE
NC
CPL_IN
RFOUT_LB
GND2
PGND
C105
1u
L103
10p
FL105
2140MHz
7
5
8
4
9
2
3
1
6
ANT
RX1
TX
GND1
GND5
GND2
RX2
GND3
GND4
C151
1.8n
SW102
4
3
2
1
ANT
COMMON
G3
G4
C146
100p
C121
39p
39p
C120
1K
R101
VBATT
C110
2.2n
C169
100p
2.2u
C132
100p
C145
100p
C129
C144
100p
FL106
942.5MHz
7
5
8
4
9
2
3
1
6
ANT
RX1
TX
GND1
GND5
GND2
RX2
GND3
GND4
C167
100p
C168
100p
VBATT
VBATT
+3V4_VWPAM_MTK
+3V4_VWPAM_MTK
U104
15
13
14
10
5
6
4
12
7
3
8
11
1
9
2
RFIN_LB
GND1
VEN_LB
RFOUT_HB
CPL_OUT
VBATT
VEN_HB
VCC
RFIN_HB
VMODE
NC
CPL_IN
RFOUT_LB
GND2
PGND
C174
22n
C175
18n
L124
1p
FL102
7
5
8
4
9
2
3
1
6
ANT
RX1
TX
GND1
GND5
GND2
RX2
GND3
GND4
C156
2.2u
R111
49.
9
27
R108
27
R109
36
R110
L107
0.5p
L125
4.7n
C139
2.2n
C155
6.8p
C135
0.1u
22p
C154
1
2
L127
15n
C131
100p
100p L109
L136
2.2n
DNI
C173
L114
33n
C134
2.2u
1
2
+2V85_VRF_MTK
+2V85_VRF_MTK
+2V8_VTCXO_MTK
+2V8_VTCXO_MTK
+2V8_VTCXO_MTK
ANT_SEL0
ANT_SEL1
ANT_SEL2
GSM_PA_EN
SYSCLK
BSI1_CLK
BSI1_CS
1
BSI1_DATA
BSI1_CS
0
GSM_UMTSTX_IN
GSM_UMTSTX_IP
GSM_UMTSTX_QN
GSM_UMTSTX_QP
GSM_PA_RAMP
+1V8_VIO_MT
K
+1V8_VRF_MTK
3GTX_B
2
3GTX_B2
TX_DCS_PCS
TX_DCS_PCS
TX_GSM850_GSM900
TX_GSM850_GSM900
3GTX_B5_B
8
3GTX_B5_B8
ANT_BAND_SEL1
ANT_BAND_SEL2
MAIN_CLK_26MHz
MAIN_CLK_26MHz
RF_TEMP_ADC
AFC
UMTSRX_IP UMTSRX_IN
UMTSRX_QP
UMTSRX_QN
RX_G1800_INP
RX_G1800_INP
RX_G1800_INN
RX_G1800_INN
TRX_B2_G1900
TRX_B2_G1900
TRX_B1
TRX_B1
RX_B1_INN
RX_B1_INN
RX_B8_G900_INP
RX_B8_G900_INP
RX_B8_G900_INN
RX_B8_G900_INN
RX_B1_INP
RX_B1_INP
RX_B5_G850_INP
RX_B5_G850_INP
RX_B5_G850_INN
RX_B5_G850_INN
RX_B2_G1900_INN
RX_B2_G1900_INN
3GTX_B8
3GTX_B8
3GTX_B5
3GTX_B5
PA_ON_B8_EN
PA_ON_B1_EN
PA_ON_B2_EN
PA_R0
PA_R0
TRX_B5_G850
TRX_B5_G850
TRX_B8_G900
TRX_B8_G900
RX_B2_G1900_INP
RX_B2_G1900_INP
PDET
PDET
PA_ON_B5_EN
3GTX_B
1
3GTX_B1
NA
ENWY0005601
0
0
0
TX_SPDT
Logic Check
RF_MAIN
MAIN_ANT
1
TRX1
TRX4
TRX3
0
1
0
1
0
0
1
TRX2
Mode
ANT_SEL0
Stand-by
0
0
0
1
0
0
ANT_SEL1 ANT_SEL2
0
1
1
0
0
0
PA_EN
TRX5
TRX6
1
1
0
1
0
TRX_B8_G900_RX
TRX_B1
TRX_B5_G850_RX
TRX_B2_G1900
G1800
Tx Module
ANT_BAND_SEL1
ANT_BAND_SEL2
3GTX_B5
B1 TRx
3GTX_B8
1
0
0
1
B2 TRx / G1900 Rx
B8 TRx / G900 Rx
WCDMA
B5 TRx / G850 Rx
TX_GSM850_GSM900
TX_DCS_PCS
0
TX_LB
TX_HB
1
1
1
0
0
1
1
6. CIRCUIT DIAGRAM