THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
I2C_SDA1
Data_Format_0
TXDBN0_L
+3.3V_NORMAL
R13062
0
NON_AUO
TXDBN1_L
TXDAP3_L
R13002
0
OLED
COMPENSATION_DONE
R13005
0
UHD_LCD 120Hz
TXDBN5_L
TXDBP7_L
TXDBN4_L
R13034
10K Non_AUO_Module
TXDBP5_L
TXDAP6_L
R13009
0
Non_OLED & Non_AUO_Module
R13010
0
Non_OLED & Non_AUO_Module
Q203
AO3438
URSA_TX_HTPD_Pullup
G
D
S
R13033
10K
OPT
R13007
10K
OPT
TXDAP2_L
R13011
10K
Non_INX_Module
I2C_SCL1
TXDBN6_L
TCON_I2C_EN
HTPDAn
R13015
0
LGD_LCD
TXDAP4_L
EL_VDD_DETECT_22V
HTPDn_IN
EL_VDD_DETECT_22V
TXDAN6_L
INV_CTL
TXDBP4_L
TXDBP2_L
R13003
10K
OPT
R212
4.7K
URSA_TX_HTPD_Pullup
TXDAP0_L
R13016
0
LGD_LCD
R13045
10K
LGD_LCD
PANEL_VCC
R13004
10K
LGD_Module
TXDBP3_L
R13040
10K
OPT
TXDAN3_L
+3.3V_NORMAL
LOCKn_IN
R13044
10K
OPT
TXDAN2_L
R220
0
OPT
TXDAP5_L
R13041
10K
LGD_LCD
R13055
33 OPT
+3.3V_NORMAL
R13059
33 OPT
TXDBN2_L
TXDBP6_L
R221
0
URSA_TX_HTPD_Pullup
R222
10K
URSA_TX_HTPD_Pullup
TXDBN7_L
R213
1.5K
URSA_TX_HTPD_Pullup
TXDBP0_L
VDD18
HTPDn_IN
TXDBP1_L
TXDAN4_L
TXDAN7_L
L13001
BLM18PG121SN1D
OLED
R13037
0
Non_AUO_Module
R13061
0
NON_AUO
+3.3V_NORMAL
TXDAP1_L
TXDAP7_L
R13006
0
3D_EN_LGD_120Hz
TXDAN1_L
+3.3V_NORMAL
TXDBN3_L
TXDAN0_L
Data_Format_1
R13001
0
OLED
TXDAN5_L
R13012 0
UHD_LCD
R13013 0
UHD_LCD
R13018
4.7K
OPT
R13019
4.7K
OPT
+3.3V_NORMAL
+3.3V_NORMAL
R13020 0
UHD_LCD
R13056 0
UHD_OLED
R13057 0
UHD_OLED
T_CON_SYS_POWER_OFF
R13021 0
UHD_LCD
R13022
0
OLED
T_CON_SYS_POWER_OFF
R13023
0
OLED
LED_R
L13000
MLB-201209-0120P-N2
51pin_12V
R13060
10K
Q1404
MMBT3904(NXP) E
B
C
Q1405
MMBT3904(NXP) E
B
C
LOCKn_IN
R1504
100
R1505
10K
VDD18
R1507
10K
+3.3V_NORMAL
R1506
10K
LOCKAn
Q13004
2N7002KA
G
D
S
Q13005
2N7002KA
G
D
S
P13000
SP14-11592-01-51Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
P13001
SP14-11592-01-41Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
R13000 10K
OPT
3D&L_DIM_EN
3D&L_DIM_EN
Output_wafer
BSD-14Y-UD-130-HD
2013.12.17
[41P Vx1
output wafer]
[51P Vx1
output wafer]
*LGD_120Hz: T240 module (UB98/95,D9)
*Pin38
GND : LGD UHD 120Hz
*Mode 3 (4 Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = High
*Pin31(BIT_SEL)
HIGH or NC : 10Bit
LOW : 8Bit
Vx1 LOCKAn/HTPDn
*Pin35(PCID)
High:PCID enable
Low or NC : PCID diable
L/D_EN(Pin30)
- T-Con L/D Function
HIGH : Enable
LOW or NC : Disable
*Mode 2 (2 Division)
- Data Format 0(Pin37) = High
Data Format 1(Pin36) = Low
Data Input Format[1:0]
NC : LGD UHD 60Hz & FHD DH(16:14)
Copyright ⓒ 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Summary of Contents for AUSYLJR
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