THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
1K
R
29
3
O
PT
TP202
1K
R
21
2
0
.1
u
F
C
29
2 OPT
MVREF
1
0
u
F
C
40
01
0.047uF
C204
TU_CVBS
D0+_HDMI1
0
.1
u
F
C
40
44 OPT
10uF
C263
BLM18PG121SN1D
L207
BLM18SG700TN1D
L226
0
.1
u
F
C
29
0
OPT
D1+_HDMI1
D2+_HDMI1
VDD33_DVI
AVDD_DMPLL
AU33
AVDD_DDR0
0
.1
u
F
C
40
56
2.2uF
C4060
1
0
u
F
C
27
6
D1+_HDMI4
SIDE_USB_DM
DSUB_HSYNC
0
.1
u
F
C
40
08
OPT
AU33
0
.1
u
F
C
40
11 OPT
0
.1
u
F
C
28
5
AUD_LRCK
VDD_RSDS
0
.1
u
F
C
40
04
O
PT
1uF
C253
AVDD_DMPLL
BLM18SG121TN1D
L223
1000pF
C210
VDD_RSDS
33
R4016
BLM18SG700TN1D
L228
1uF
C4045
AU25
+1.26V_VDDC
D1-_HDMI4
D0-_HDMI4
0
.1
u
F
C
40
42
OPT
CK+_HDMI4
0.047uF
C214
+2.5V_Normal
10
K
R
40
26
0.047uF
C208
1
0
u
F
C
40
22
OPT
BLM18PG121SN1D
L227
BLM18PG121SN1D
L217
0
.1
u
F
C
40
32
2.2uF
C245
PC_R_IN
0.047uF
C231
AVDD25_PGA
33
R249
0
.1
u
F
C
28
6
OPT
33
R257
AVDD_DDR0
0
R236
0
.1
u
F
C
40
26
0
.1
u
F
C
40
28
VDD33_DVI
100
R201
OPT
TP209
D0-_HDMI1
0
.1
u
F
C
40
19 OPT
AVDD_DMPLL
0
.1
u
F
C
40
14
AUD_SCK
VDD33
100
R288
TU_SCL
2.2uF
C242
1
0
u
F
C
40
61
55INCH
0.1uF
C251
VDD33
0
.1
u
F
C
28
3 OPT
AVDD_DDR0
IR
+3.3V_Normal
+2.5V_Normal
FRCVDDC
+1.5V_FRC_DDR
0
.1
u
F
C
29
1
55
IN
C
H
COMP2_R_IN
VDD33
68
R231
RF_SWITCH_CTL
CEC_REMOTE_S7
+1.26V_VDDC
2.2uF
C238
MODEL_OPT_1
D1-_HDMI1
22
R292
OPT
AVDD2P5
33
R248
1
0
u
F
C
27
5
C
MODEL_OPT_4
0
.1
u
F
C
40
43
68
R258
1
0
u
F
C
27
9
55
IN
C
H
B
L
M
18
PG
12
1S
N
1D
L
2
1
0
55
IN
C
H
AVDD2P5
MODEL_OPT_4
0.047uF
C223
OPT
SIDE_USB_DP
COMP2_DET
0
.1
u
F
C
40
58
55INCH
1K
55
IN
C
H
R
22
6
0
.1
u
F
C
40
16
0.047uF
C209
+2.5V_Normal
+3.3V_Normal
1K
R4019
1K
R
29
7
BLM18PG121SN1D
L206
0.047uF
C225
0.047uF
C221
0.047uF
C213
0
.1
u
F
C
40
38
AV_R_IN
D2-_HDMI1
TP210
0.047uF
C222
0
.1
u
F
C
40
46
SIDEAV_L_IN
68
R242
BLM18PG121SN1D
L215
100
R202
OPT
100
OPT
R210
1K
42
IN
C
H
R
22
7
1K
O
PT
R
21
1
1/
16
W
1K
1%
R
40
14
VDD33
0.047uF
C218
24MHz
X201
0.022uF
16V
C4065
0
.1
u
F
C
40
62
0.047uF
C220
10
K
R
40
23
TP201
2.2uF
C247
OPT
33
R255
AU25
33
R250
MIU1VDDC
0
.1
u
F
55
IN
C
H
C
24
0
22
R4018
55INCH
MODEL_OPT_2
BLM18PG121SN1D
L204
AVDD_DDR0
D0+_HDMI4
+3.3V_Normal
+2.5V_Normal
MODEL_OPT_5
1000pF
C217
VDD33
BLM18PG121SN1D
L222
55INCH
47
R4003
0
.1
u
F
C
40
41
55INCH
CK-_HDMI4
22
R4025
DDC_SDA_4
0.1uF
C288
10K
R4020
0
.1
u
F
C
40
07
OPT
1K
O
PT
R
21
5
0
.1
u
F
C
40
17
AVDD2P5
100
R289
DDC_SDA_1
0
.1
u
F
C
40
31
1K
R
20
7
O
PT
2.2uF
C239
0.1uF
C4005
LED_DRIVER_D/L_SDA
22
R291
OPT
68
R256
FRC_VDD33_DDR
TP203
33
R245
MIU0VDDC
AUD_LRCH
0
.1
u
F
C
40
24
33
R237
0.047uF
C216
MODEL_OPT_5
0.047uF
C230
2.2uF
C244
0
.1
u
F
C
40
03
+1.26V_VDDC
0.047uF
C4057
33
R239
0.047uF
C207
0
.1
u
F
C
40
40
AVDD_DDR0
1
0
u
F
C
28
9
0.1uF
C258
1
0
u
F
C
40
63
0
.1
u
F
C
29
8
O
PT
100
R296
2.2uF
OPT
C234
0.047uF
C232
0
.1
u
F
C
29
5
IF_P_MSTAR
HPD4
MODEL_OPT_0
IF_AGC_SEL
0.047uF
C227
10uF
C287
27pF
C262
TP211
0
.1
u
F
C
40
09
0
.1
u
F
C
29
4
0
.1
u
F
C
40
20
OPT
AUD_MASTER_CLK_0
SPDIF_OUT
0.047uF
C211
+1.5V_DDR
0.047uF
C215
MODEL_OPT_6
TP205
SOC_RESET
2.2uF
C246
OPT
TU_SIF
1M
R
28
7
FRC_AVDD
CK+_HDMI1
BLM18PG121SN1D
L219
1
0
u
F
C
40
66
AVDD_DDR0
AVDD2P5
1
0
u
F
C
29
3
OPT
AV_CVBS_IN
BLM18PG121SN1D
L221
55INCH
DDC_SCL_4
LED_DRIVER_D/L_SCL
10
K
R
40
17
OPT
1K
R
29
5
O
PT
HPD1
68
R233
0.047uF
C226
PC_L_IN
TP207
1/
16
W
1K
1%
R
40
15
33
R228
33
R246
IF_AGC_MAIN
0
.1
u
F
C
40
12
33
R253
MODEL_OPT_3
AMP_SCL
D2-_HDMI4
FRCVDDC
AV_CVBS_IN2
VDD33
FRC_VDD33_DDR
D2+_HDMI4
AV_L_IN
0
.1
u
F
C
24
1
0
.1
u
F
C
40
25
1K
O
PT
R
29
4
0
.1
u
F
C
40
27
1K
O
PT
R
21
4
0.047uF
C206
BLM18PG121SN1D
L213
OPT
33
R244
BLM18PG121SN1D
L212
NEC_SCL
+1.26V_VDDC
AVDD2P5
NEC_SDA
68
R240
DEMOD_SDA
IF_N_MSTAR
68
R229
FRC_LPLL
0.047uF
C233
+2.5V_Normal
10K
R205
55INCH
BLM18SG121TN1D
L202
0.047uF
C212
33
R241
BLM18PG121SN1D
55INCH
L214
0.047uF
C219
0
.1
u
F
C
29
7
OPT
1
0
u
F
C
28
1 OPT
TU_SDA
AVDD2P5
DEMOD_SCL
0
.1
u
F
C
40
02
0.1uF
C4015
OPT
CK-_HDMI1
MIU0VDDC
TP208
2.2uF
C237
OPT
0.1uF
C257
AVDD_DDR_FRC
1
0
u
F
C
28
4
COMP2_L_IN
LNA2_CTL
AVDD_DDR_FRC
0.047uF
C229
100
R204
OPT
1
0
u
F
C
28
2
55
IN
C
H
+3.3V_Normal
+1.26V_VDDC
TP204
DDC_SCL_1
0.047uF
C205
68
R238
B
L
M
18
PG
12
1S
N
1D
L
2
0
9
33
R251
AVDD25_PGA
47
R4002
C
100
R203
OPT
2.2uF
C236
OPT
1
0
u
F
C
22
8
10
K
R
40
06
0
.1
u
F
C
40
36
OPT
0.1uF
C4064
VDD33
SIDEAV_CVBS_IN
0
.1
u
F
C
40
10
55
IN
C
H
AMP_SDA
SIDEAV_R_IN
2.2uF
C243
FRC_RESET
1K
R
20
9
1
0
0
0
p
F
O
PT
C
26
4
27pF
C261
DSUB_VSYNC
0
.1
u
F
C
40
23
22
R4024
AV_CVBS_IN2
100
R298
OPT
68
R254
0.1uF
C250
1000pF
C224
1000pF
OPT
C203
2.2uF
C4059
FRC_AVDD
+3.3V_Normal
4.7uF
C249
MVREF
33
R230
1
0
u
F
C
40
18
BLM18SG700TN1D
L225
55INCH
1
0
u
F
C
27
8
0.1uF
C256
FRC_LPLL
BLM18PG121SN1D
L211
2.2uF
OPT
C235
0
.1
u
F
C
29
6
TP206
MIU1VDDC
33
R232
1K
O
PT
R
20
8
68
R252
0
.1
u
F
C
28
0
ET_MDC
ET_TXD1
ET_CRS
ET_TXD0
ET_REF_CLK
ET_RXD1
ET_MDIO
ET_TX_EN
ET_RXD0
LGE107DC-RP [S7M+ DIVX/MS10]
IC101
S7M-PLUS_DivX_MS10
A_RXCP
F1
A_RXCN
F2
A_RX0P
G2
A_RX0N
G3
A_RX1P
H3
A_RX1N
G1
A_RX2P
H1
A_RX2N
H2
DDCDA_DA/GPIO24
F5
DDCDA_CK/GPIO23
F4
HOTPLUGA/GPIO19
E6
B_RXCP
D3
B_RXCN
C1
B_RX0P
D1
B_RX0N
D2
B_RX1P
E2
B_RX1N
E3
B_RX2P
F3
B_RX2N
E1
DDCDB_DA/GPIO26
D4
DDCDB_CK/GPIO25
E4
HOTPLUGB/GPIO20
D5
C_RXCP
AA2
C_RXCN
AA1
C_RX0P
AB1
C_RX0N
AA3
C_RX1P
AB3
C_RX1N
AB2
C_RX2P
AC2
C_RX2N
AC1
DDCDC_DA/GPIO28
AB4
DDCDC_CK/GPIO27
AA4
HOTPLUGC/GPIO21
AC3
D_RXCP
A2
D_RXCN
A3
D_RX0P
B3
D_RX0N
A1
D_RX1P
B1
D_RX1N
B2
D_RX2P
C2
D_RX2N
C3
DDCDD_DA/GPIO30
B4
DDCDD_CK/GPIO29
C4
HOTPLUGD/GPIO22
E5
CEC/GPIO5
D6
HSYNC0
G5
VSYNC0
G6
RIN0P
K1
RIN0M
L3
GIN0P
K3
GIN0M
K2
BIN0P
J 3
BIN0M
J 2
SOGIN0
J 1
HSYNC1
G4
VSYNC1
H6
RIN1P
K5
RIN1M
K4
GIN1P
J 4
GIN1M
K6
BIN1P
H4
BIN1M
J 6
SOGIN1
J 5
HSYNC2
H5
RIN2P
N3
RIN2M
N2
GIN2P
M2
GIN2M
M1
BIN2P
L2
BIN2M
L1
SOGIN2
M3
CVBS0P
N4
CVBS1P
N6
CVBS2P
L4
CVBS3P
L5
CVBS4P
L6
CVBS5P
M4
CVBS6P
M5
CVBS7P
K7
CVBS_OUT1
M6
CVBS_OUT2
M7
VCOM0
N5
VIFP
W2
VIFM
W1
I P
V2
IM
V1
SSIF/SIFP
Y2
SSIF/SIFM
Y1
QP
U3
QM
V3
IFAGC
Y5
RF_TAGC
Y4
TGPIO0/UPGAIN
U1
TGPIO1/DNGAIN
U2
TGPIO2/I2C_CLK
R3
TGPIO3/I2C_SDA
T3
XTALIN
T2
XTALOUT
T1
SPDIF_IN/GPIO177
G14
SPDIF_OUT/GPIO178
G13
DM_P0
B7
DP_P0
A7
DM_P1
AF17
DP_P1
AE17
I2S_IN_BCK/GPIO175
F14
I2S_IN_SD/GPIO176
F13
I2S_IN_WS/GPIO174
F15
I2S_OUT_BCK/GPIO181
D20
I2S_OUT_MCK/GPIO179
E20
I2S_OUT_SD/GPIO182
D19
I2S_OUT_SD1/GPIO183
F18
I2S_OUT_SD2/GPIO184
E18
I2S_OUT_SD3/GPIO185
D18
I2S_OUT_WS/GPIO180
E19
LINE_IN_0L
N1
LINE_IN_0R
P3
LINE_IN_1L
P1
LINE_IN_1R
P2
LINE_IN_2L
P4
LINE_IN_2R
P5
LINE_IN_3L
R6
LINE_IN_3R
T6
LINE_IN_4L
U5
LINE_IN_4R
V5
LINE_IN_5L
U6
LINE_IN_5R
V6
LINE_OUT_0L
U4
LINE_OUT_2L
W3
LINE_OUT_3L
W4
LINE_OUT_0R
V4
LINE_OUT_2R
Y3
LINE_OUT_3R
W5
MIC_DET_IN
R4
MICCM
T5
MICIN
R5
AUCOM
T4
VRM
P7
VAG
R7
VRP
P6
HP_OUT_1L
R1
HP_OUT_1R
R2
ET_RXD0
E21
ET_TXD0
E22
ET_RXD1
D21
ET_TXD1
F21
ET_REFCLK
E23
ET_TX_EN
D22
ET_MDC
F22
ET_MDIO
D23
ET_CRS
F23
AVLINK
F8
IRINT
G8
TESTPIN
K8
RESET
A4
U3_RESET
Y17
LGE107DC-RP [S7M+ DIVX/MS10]
IC101
S7M-PLUS_DivX_MS10
VDDC_1
H11
VDDC_2
H12
VDDC_3
H13
VDDC_4
H14
VDDC_5
H15
VDDC_6
J12
VDDC_7
J13
VDDC_8
J14
VDDC_9
J15
VDDC_10
J16
VDDC_11
L18
A_DVDD
H16
B_DVDD
K19
FRC_VDDC_0
L19
FRC_VDDC_1
M18
FRC_VDDC_2
M19
FRC_VDDC_3
N18
FRC_VDDC_4
N19
FRC_VDDC_5
N20
FRC_VDDC_6
P18
FRC_VDDC_7
P19
FRC_VDDC_8
P20
U3_DVDD_DDR
Y12
AVDD1P2
J11
DVDD_NODIE
L7
AVDD2P5_ADC_1
H7
AVDD2P5_ADC_2
J 7
AVDD25_REF
J 8
AVDD_AU25
L8
PVDD_1
W15
PVDD_2
Y15
AVDD25_PGA
U8
AVDD_NODIE
M8
AVDD_DVI_1
N9
AVDD_DVI_2
P9
AVDD3P3_CVBS
N8
AVDD_DMPLL
P8
AVDD_AU33
T7
AVDD_EAR33
U7
AVDD33_T
T9
VDDP_1
R8
VDDP_2
R9
VDDP_3
T8
FRC_VD33_2_1
V20
FRC_VD33_2_2
W20
FRC_AVDD_RSDS_1
U19
FRC_AVDD_RSDS_2
U20
FRC_AVDD_RSDS_3
V19
FRC_AVDD
W19
FRC_AVDD_LPLL
U18
FRC_AVDD_MPLL
T20
FRC_VDD33_DDR
Y14
AVDD_MEMPLL
R19
FRC_AVDD_MEMPLL
W14
AVDD_DDR0_D_1
D15
AVDD_DDR0_D_2
D16
AVDD_DDR0_D_3
E15
AVDD_DDR0_D_4
E16
AVDD_DDR0_C
E17
AVDD_DDR1_D_1
F16
AVDD_DDR1_D_2
F17
AVDD_DDR1_D_3
G16
AVDD_DDR1_D_4
G17
AVDD_DDR1_C
H17
FRC_AVDD_DDR_D_1
AB11
FRC_AVDD_DDR_D_2
AB12
FRC_AVDD_DDR_D_3
AC11
FRC_AVDD_DDR_D_4
AC12
FRC_AVDD_DDR_C
AA12
MVREF
G15
NC_1
Y7
NC_2
Y8
GND_1
G18
GND_2
H9
GND_3
H10
GND_4
H18
GND_5
H19
GND_6
J10
GND_7
J17
GND_8
J18
GND_9
J19
GND_10
K9
GND_11
K10
GND_12
K11
GND_13
K12
GND_14
K13
GND_15
K14
GND_16
K15
GND_17
K16
GND_18
K17
GND_19
K18
GND_20
L9
GND_21
L10
GND_22
L11
GND_23
L12
GND_24
L13
GND_25
L14
GND_26
L15
GND_27
L16
GND_28
L17
GND_29
M9
GND_30
M10
GND_31
M11
GND_32
M12
GND_33
M13
GND_34
M14
GND_35
M15
GND_36
M16
GND_37
M17
GND_38
N10
GND_39
N11
GND_40
N12
GND_41
N13
GND_42
N14
GND_43
N15
GND_44
N16
GND_45
N17
GND_46
P10
GND_47
P11
GND_48
P12
GND_49
P13
GND_50
P14
GND_51
P15
GND_52
P16
GND_53
P17
GND_54
R10
GND_55
R11
GND_56
R12
GND_57
R13
GND_58
R14
GND_59
R15
GND_60
R16
GND_61
R17
GND_62
R18
GND_63
T10
GND_64
T11
GND_65
T12
GND_66
T13
GND_67
T14
GND_68
T15
GND_69
T16
GND_70
T17
GND_71
T18
GND_72
T19
GND_73
U10
GND_74
U11
GND_75
U12
GND_76
U13
GND_77
U14
GND_78
U15
GND_79
U16
GND_80
U17
GND_81
V7
GND_82
V8
GND_83
V9
GND_84
V10
GND_85
V11
GND_86
V12
GND_87
V13
GND_88
V14
GND_89
V15
GND_90
V16
GND_91
V17
GND_92
V18
GND_93
W7
GND_94
W8
GND_95
W9
GND_96
W10
GND_97
W11
GND_98
W12
GND_99
W13
GND_100
W16
GND_101
W17
GND_102
W18
GND_103
Y13
GND_104
Y18
GND_105
AA13
GND_106
AB13
GND_107
AC13
GND_FU
J 9
PGA_VCOM
U9
GND_108
D17
GND_109
H23
GND_110
AF13
0
.1
u
F
C
27
7
0
.1
u
F
C
29
9
0
.1
u
F
C
40
06
0
.1
u
F
C
40
13
0.047uF
C248
0
OPT
R213
0
OPT
R216
EXT_SPK_L
22
K
R
1
0
0
6
8
0
.0
1
u
F
C
27
2
22
K
R
1
0
0
6
9
EXT_SPK_R
0
.0
1
u
F
C
26
8
100
R218
100
R217
1K
R
20
6
D18
MODEL_OPT_3
DVB_T2
r e s e r v e d f o r F R C : L O W H I G H
HD
B6
FRC_AVDD:60mA
AU33:31mA
TU/DEMOD_I2C
E18
T
U
O/
nI
S
B
V
C
U5_EXTERNALBOOT :HIGH HIGH
MODEL_OPT_0
Close to MSTAR
FRC_MPLL:4mA
MODEL_OPT_5
AVDD_DDR1:55mA
AVDD_DMPLL/AVDD_NODIE:7.362mA
VDD33_T/VDDP/U3_VD33_2:47mA
100/120Hz LVDS
MODEL_OPT_6
DTV_IF
F9
Normal Power 3.3V
LCD
AVDD_DDR_FRC:55mA
FRC_LPLL:13mA
MODEL OPTION
OLED
MODEL_OPT_2
Close to MSTAR
I
M
D
H
Normal 2.5V
AVDD2P5/ADC2P5:162mA
RSDS Power OPT
B
U
S
D
50/60Hz LVDS
PIN NAME
MODEL_OPT_1
I2
S
_
I/
F
VDD_RSDS:88mA
Close to MSTAR
NO FRC
FRC_HW_OPT
PIN NO.
DDR3 1.5V
A
U
D
IO
IN
U3_INTERNAL : HIGH LOW
VDDC 1.26V
LOW
HIGH
AVDD_DDR0:55mA
Ready
VDDC : 2026mA
AVDD25_PGA:13mA
G19
C5
MODEL_OPT_4
SIDE USB
FHD
d e f a u l t
MODEL OPTION
VDD33_DVI:163mA
F7
FRC_VDD33_DDR:50mA
N O _ F R C : L O W L O W
NON_DVB_T2
AVDD_MEMPLL:24mA
Delete CHB_CVBS_IN
Close to MSTAR
OPT_0
RSDS Power OPT
AU25:10mA
- - > I n c a s e o f G P 2 , T h i s p o r t w a s u s e d f o r G I P / N O N _ G I P
ANALOG SIF
2
P
M
O
C
PHM_ON
OPT_4
PHM_OFF
- - > T h i s o p t i o n i s o n l y a p p l i e d i n E U .
I n c a s e o f N O N _ E U , d e f a u l t v a l u e s e t L O W .
GP2R
MAIN2, HW OPT
2
20101023
--> MODEL_OPT_5, MODEL_OPT_6
: Only 3D_SG GPIO OUTPUT CONTROL
Copyright
©
2011 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Summary of Contents for 55LV355C-UA
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