THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
TXC3N
TXACLKN
C7102
0.1uF
50V
OPT
TXA0N
C7100
10uF
16V
OPT
TXC2N
TXCCLKP
TXA1P
TXBCLKN
PANEL_VCC
TXA2P
TXD3N
TXC2P
TXC4N
TXCCLKN
TXD4N
R7103
10K
BIT_SEL_LOW
TXB1P
TXB2P
TXB0N
TXA4N
TXB4P
TXBCLKP
TXC0P
TXC1N
TXD2N
TXA1N
L7100
BLM18SG121TN1D
TXB1N
TXA3P
TXD0P
TXD1P
TXA2N
TXA4P
TXD3P
TXB0P
TXB2N
TXB3N
TXA3N
TXC4P
R7102
10K
LVDS_SEL_LOW
TXDCLKN
R7101
3.3K
LVDS_SEL_HIGH
TXC1P
TXACLKP
TXB4N
TXA0P
TXB3P
TXC0N
TXD1N
+3.3V_NORMAL
TXD4P
TXDCLKP
TXD0N
TXC3P
C7101
1000pF
50V
OPT
TXD2P
P7100
FI-RE51S-HF-J-R1500
1
NC
2
NC
3
NC
4
NC
5
NC
6
AUO_65_MIRROR
7
LVDS_SEL
8
NC
9
NC
10
TM120_ENABLE
11
GND
12
RA0N
13
RA0P
14
RA1N
15
RA1P
16
RA2N
17
RA2P
18
GND
19
RACLKN
20
RACLKP
21
GND
22
RA3N
23
RA3P
24
RA4N
25
RA4P
26
GND
27
BIT_SEL
28
RB0N
29
RB0P
30
RB1N
31
RB1P
32
RB2N
33
RB2P
34
GND
35
RBCLKN
36
RBCLKP
37
GND
38
RB3N
39
RB3P
40
RB4N
41
RB4P
42
GND
43
GND
44
GND
45
GND
46
GND
47
NC
48
VLCD
49
VLCD
50
VLCD
51
VLCD
52
GND
P7101
FI-RE41S-HF-J-R1500
G3S
1
NC
2
NC
3
NC
4
NC
5
NC
6
NC
7
NC
8
NC
9
GND
10
RC0N
11
RC0P
12
RC1N
13
RC1P
14
RC2N
15
RC2P
16
GND
17
RCCLKN
18
RCCLKP
19
GND
20
RC3N
21
RC3P
22
RC4N
23
RC4P
24
GND
25
GND
26
RD0N
27
RD0P
28
RD1N
29
RD1P
30
RD2N
31
RD2P
32
GND
33
RDCLKN
34
RDCLKP
35
GND
36
RD3N
37
RD3P
38
RD4N
39
RD4P
40
GND
41
GND
42
GND
R7105
33
PWM_DIM
R7104
33
+3.3V_NORMAL
R7106
3.3K
OPT
R7107
10K
BPL_IN
FRC3_FLASH_WP
I2C_BE_SDA1
I2C_BE_SCL1
FLASH_WP
LOCAL_DIM_EN
I2C_BE_SDA1
I2C_BE_SCL1
R7108
0
G3S
R7109
0
G3S
+3.5V_ST
C7103
10uF
10V
SOC_RESET
P7102
12505WS-10A00
OPT
1
/TRST
2
TDI
3
TDO
4
TMS
5
TCK
6
/RST
7
RTCK
8
VCC
9
GND
10
GND
11
GND
C7104
0.1uF
OPT
TCK0
TDI0
TMS0
TDO0
+3.3V_NORMAL
TRST_N0
TCON_I2C
T-CON_EEPROM_WP
R7110
0
G3S
R7111
0
G3S
3D_EN
ODC_CTL
BIT_SEL
[51Pin LVDS OUTPUT Connector]
[41Pin LVDS OUTPUT Connector]
LVDS
LVDS_SEL
71
LVDS_HIGH_MID
2011.04.30
TM120_EN
Close to IC3000, pin#48
JTAG I/F FOR MAIN
will be deleted after DV_Set
Copyright ⓒ 2013 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Summary of Contents for 50GA6400
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