THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Vx1 51P
2014-08-27
21
K2H
LOCKAn_IN
TCON_I2C_EN
+3.3V_NORMAL
R7103
0
LGD/INX/BOE_Module
R7109
10K
OPT
+3.3V_NORMAL
R7123
10K
Non_LGD_60Hz
+3.3V_NORMAL
R7112
10K
OPT
PANEL_VCC
C7101
10uF
25V
PANEL_VX1_51P_VCC
I2C_SDA6
R7110
10K
OPT
DATA_FORMAT_0
+3.3V_NORMAL
R7111
10K
VBY1_LGD/BOE_M+_MODULE
I2C_SCL6
+3.3V_NORMAL
R7115
4.7K
OPT
L7100
MLB-201209-0120P-N2
PANEL_VX1_51P_VCC
HTPDAn_IN
R7104
10K
OPT
R7116
4.7K
OPT
R7120
33 OPT
TCON_I2C_EN
R7119
33 OPT
C7100
10uF
25V
PANEL_VX1_51P_VCC
DATA_FORMAT_1
R7102
10K
OPT
P7100
SP14-11592-01-51Pin
LGD/BOE_PANEL_VX1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
3D&L_DIM_EN
R7108
0
3D&L_DIM_EN_Micom
AR7101
0
1/16W
LGD_PANEL_VX1
R7105
1K
1/16W
5%
VBY1_LGD/BOE_M+_MODULE
TXDBN5_L
TXDBP3_L
TXDBP0_L
TXDBP6_L
TXDBN2_L
TXDBN6_L
TXDBN0_L
TXDBN4_L
TXDBP4_L
TXDBN3_L
TXDBP5_L
TXDBN1_L
TXDBP2_L
TXDBN7_L
TXDBP7_L
TXDBP1_L
C7104
0.1uF
LGD/BOE_PANEL_VX1
C7107
0.1uF
LGD/BOE_PANEL_VX1
C7106
0.1uF
LGD/BOE_PANEL_VX1
C7102
0.1uF
LGD/BOE_PANEL_VX1
C7105
0.1uF
LGD/BOE_PANEL_VX1
C7103
0.1uF
LGD/BOE_PANEL_VX1
C7109
0.1uF
LGD/BOE_PANEL_VX1
C7111
0.1uF
LGD/BOE_PANEL_VX1
C7108
0.1uF
LGD/BOE_PANEL_VX1
C7112
0.1uF
LGD/BOE_PANEL_VX1
C7113
0.1uF
LGD/BOE_PANEL_VX1
C7110
0.1uF
LGD/BOE_PANEL_VX1
C7115
0.1uF
LGD/BOE_PANEL_VX1
C7114
0.1uF
LGD/BOE_PANEL_VX1
C7117
0.1uF
LGD/BOE_PANEL_VX1
C7116
0.1uF
LGD/BOE_PANEL_VX1
PWM_TCON_OUT
+3.3V_NORMAL
HTPDAn_IN
+3.3V_NORMAL
HTPDAn
R7126
0
OPT
LOCKAn_IN
LOCKAn
R7113
0
LGD/BOE_PANEL_VX1
R7114
0
LGD/BOE_PANEL_VX1
R7117
0
OPT
R7128
100
OPT
Q7102
2N3904S
OPT
E
B
C
R7122
100
OPT
R7121
10K
OPT
+1.8V
LOCKAn_IN
+3.3V_NORMAL
LOCKAn
Q7103
2N3904S
OPT
E
B
C
R7129
1K
OPT
R7127
1K
OPT
Q7100
T2N7002AK
LGD_PANEL_VX1_FET
S
G
D
Q7101
T2N7002AK
LGD_PANEL_VX1_FET
S
G
D
R7124
0
VBY_MODULE
PWM_DIM
R7134
0
VBY1_LGD/BOE_M+_MODULE
PWM_TCON_OUT
R7133
0
OPT
R7132
0
VBY1_LGD/BOE_M+_MODULE
R7100
10K
VBY1_LGD/BOE_M+_MODULE
+3.3V_NORMAL
DATA_FORMAT_0
R7131
0
VBY1_LGD/BOE_M+_MODULE
+3.3V_NORMAL
R7106
10K
OPT
VX1_MSE
R7130
1K
VBY_MODULE
R7137
100
VBY_MODULE
AGP_CTRL
R7101
0
AGP_CTRL
R7107
0
OPT
R7125
0
NON_BOE MODULE
R7136
10K
LGD/BOE_PANEL_VX1
R7118
10K
LGD/BOE_PANEL_VX1
Data Input Format[1:0]
*Mode 1 (NON Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = Low
*Pin31(BIT_SEL)
HIGH or NC : 10Bit
LOW : 8Bit
[51P Vx1
output wafer]
*Mode 3 (4 Division)
- Data Format 0(Pin37) = Low
Data Format 1(Pin36) = High
C7102~C7117
Close to EPI Wafer!
Must be assigned at Vx1 51p wafer !!!
EPI Share Lane
M+ LGD_Module
High : AGP & M+ BYPASS
L & NC : NSB & M+ ENABLE
(MPLUS MODE 0)
(MPLUS MODE 1)
Input Data Format[1:0]=[35pin:36pin]
’00’ : Low Power(MLE Off)
’01’ : High Luminance
(MLE3)
’10’ : High Luminance
(MLE1,2)
’11’ : PC Mode
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Only for training and service purposes
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Summary of Contents for 43UH610
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