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4.2.8 Time Base
Introduction
The time base includes three circuits:
•
MCG426
: generates sampling clocks: 12.5 MHz up to 2GHz
generates clocks for the MTB411
interleaves sampling clocks to increase sampling rate and memory
depth.
•
MTB411A
: Time Base System
TDC interpolator and Real Time computation
Trigger circuitry
Frequency divider
•
MST429A
:
Single source trigger, Standard trigger, Hold off, Pulse width & interval
Multiple source trigger, State qualified, Edge qualified
Block
Diagram
MTB 411
MST 429
MCG 426
HSH & ADC
SHCK_A
SHCK_B
SHCK_C
SHCK_D
2
2
2
2
MCK
TRIG
TRIG
2
Peak
Detect
MPD
10 MHz
Reference
INTREF
PHDET
VCO
VCO2G
PDCK
2
2
2
RAMPST
R
A
M
PS
TRT
TRT
to trigger selection
SHCK_A
SHCK_B
SHCK_C
SHCK_D
Q
Q
D
ENABLE
TRIGEN
ITBUSY
MACQ
FDEND
FDCK
TR
IG
D
IT
C
K
TRIGD
ITCK
FDCK
FDEND
MACQ
INT
2
TBCK
TSCK
TSCK
TBCK
BCK
_ITMB
to uP
MEMORY
MCK
DIN[7..0]
EXTREF
EXTCK
EXTREF
EXTCK
2
RT
C
K
RTCK
S2EDGE
Vcc
MCLR
CLR
EN10MHZ
10MHZ
clock 10MHz
500MHZ
clock 500MHz
CONTROL
from uP
DIO(7:0) +
A(1:0) +
control
enable
clock 10MHz
Time Base Block Diagram
Theory of Operation
4-17
Summary of Contents for Waverunner2 LT262 Series
Page 1: ...LTXXX2 SM E LeCroy Waverunner2 Series Service Manual Version D December 2003 ...
Page 30: ...4 12 Theory of Operation Block diagram 1 HAM631 ...
Page 55: ...Rev D Performance Verification 5 19 ...
Page 62: ...5 26 Performance Verification Rev D Set Global BWL 200 MHz Set Timebase 5 nsec div ...
Page 80: ...5 44 Performance Verification Rev D a Pulse Width 10 nsec b Pulse Width 10 nsec ...
Page 84: ...5 48 Performance Verification Rev D ...
Page 86: ...Rev D 2 of 12 This page intentionally left blank ...
Page 96: ...Rev D 12 of 12 LT584 LT374 372 LT354 LT264 262 Test Record This page intentionally left blank ...
Page 114: ...6 18 Maintenance ...
Page 126: ...7 12 Mechanical Parts Removal F2 ...
Page 154: ...Mechanical Part Removal 7 21 ...