4-12
Theory of Operation
4.6.2.1.4
Control
– The operating mode of the ADC is controlled
through JTAG, the control of each acquisition, start, stop etc
is controlled by the HTB.
4.6.2.2
MAM439
- 8 Megabytes DRAM
4.6.2.2.1
Signal I/O
– The MAM439 has two, nine bit differential
inputs, each with two differential quadrature clock inputs.
Output is through an 8B/10B Ethernet transceiver.
4.6.2.2.2
Control
– The state of MAM is controlled through JTAG and
through the Gigabit Ethernet link, the control of each
acquisition, clock, reset, stop etc is controlled by the HTB.
4.6.2.2.3
Decimation
– When the sample rate is below 10GS/s, the
MAM439 ignores or decimates the correct amount of
samples so that the desired sample rate is achieved. The
ADC always digitizes at 10 GSs.
4.6.2.3 8b/10b
Bus
AD
C
MAM
MAM
MAM
Control
FPGA
MTB
MST
AD
C
MAM
MAM
MAM
Buffer
Resistor
Jumper
8B 10B Bus
ATC
Figure 4-8 8b/10b Path
Summary of Contents for WAVERUNNER 6000 SERIES
Page 16: ...2 4 General Information This page intentionally left blank ...
Page 22: ...This page intentionally left blank 3 6 Specifications ...
Page 42: ...4 20 Theory of Operation This page intentionally left blank ...
Page 84: ...5 42 Performance Verification WR6K Rev D 5 42 Performance Verification WR6K Rev D ...
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Page 129: ...Figure 6 3 View of the power supply adjustment locations Maintenance 6 33 ...
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Page 261: ...Figure 8 27 Dimensions Mechanical Parts 8 27 ...
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Page 318: ...LeCroy Rackmount Kit for the 6000series ...