WinFast
®
6200MA User’s Manual
29
ISA Bus Clock Frequency
The ISA bus clock speed is the speed at which the CPU communicates with the AT bus
(expansion bus). The speed is measured as a fraction of PCICLKI, the timing signal of the PCI
bus. Experiment with setting the bus timing to a lower speed (for example, from PCICLKI/3 to
PCICLKI/4) if an installed expansion peripheral has performance problems.
Starting Point of Paging
This value controls the start timing of memory paging operations.
SDRAM CAS Latency
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends on
the DRAM timing. Do not reset this field from the default value specified by the system
designer.
SDRAM WR Retire Rate
The system designer must select the correct timing for data transfers from the write buffer to
memory, according to DRAM specifications.
CPU to PCI Burst Mem. WR
When this option is enabled, the chipset is allowed to assemble long PCI bursts from the data
held in its buffers.
System BIOS Cacheable
Selecting Enabled allows caching of the system BIOS ROM at F0000h-FFFFFh, resulting in
better system performance. However, if any program writes to this memory area, a system error
may result.
The choice: Enabled, Disabled.
Video RAM Cacheable
Selecting Enabled allows caching of the video memory (RAM) at A0000h to AFFFFh, resulting
in better video performance. However, if any program writes to this memory area, a memory
access error may result. The choice: Enabled, Disabled.
Memory Hole at 15M-16M
You can reserve this area of system memory for ISA adapter ROM. When this area is reserved,
it cannot be cached. The user information of peripherals that need to use this area of system
memory usually discusses their memory requirements.
The choice: Enabled, Disabled.
AGP Aperture Size (MB)
Select the size of the Accelerated Graphics Port (AGP) aperture. The aperture is a portion of the
PCI memory address range dedicated for graphics memory address space. Host cycles that hit
the aperture range are forwarded to the AGP without any translation. See www.agpforum.org
for APG information.
The choice: 4, 8, 16, 32, 64, 128, and 256MB
DRAM Controller 1 T WR/RD
Enable or Disable DRAM controller one circle write/read for VUMA function.
Concurrent function (MEM)/(PCI)
Enable or Disable Memory/PCI bus utilization optimized.