Leadtek WinFast 6200MA, User Manual, Page: 32 / 61

Leadtek Research Inc.
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4-4 Chipset Features Setup Menu
This section allows you to configure the system based on the specific features of the installed
chipset. This chipset manages bus speeds and access to system memory resources, such as
DRAM and the external cache. It also coordinates communications between the conventional
ISA bus and the PCI bus. It must be stated that these items should never need to be altered. The
default settings have been chosen because they provide the best operating conditions for your
system. The only time you might consider making any changes would be if you discovered that
data was being lost while using your system.
ROM PCI/ISA BIOS
ROM PCI/ISA BIOS ROM PCI/ISA BIOS
ROM PCI/ISA BIOS (2A6INLB9)
(2A6INLB9) (2A6INLB9)
(2A6INLB9)
C
C C
CHIPSET FEATURES
HIPSET FEATURES HIPSET FEATURES
HIPSET FEATURES SETUP
SETUP SETUP
SETUP
AWARD SOFTWARE, INC. AWARD SOFTWARE, INC. AWARD SOFTWARE, INC. AWARD SOFTWARE, INC.
S SS Spread Spectrum : Disabled pread Spectrum : Disabled pread Spectrum : Disabled pread Spectrum : Disabled
OnBoard ESS Solo1 Audio : Enabled
OnBoard ESS Solo1 Audio : Enabled OnBoard ESS Solo1 Audio : Enabled
OnBoard ESS Solo1 Audio : Enabled
CPU Host/SDRAM Clock : Default
CPU Host/SDRAM Clock : Default CPU Host/SDRAM Clock : Default
CPU Host/SDRAM Clock : Default
Auto Configuration : Disabled Auto Configuration : Disabled Auto Configuration : Disabled Auto Configuration : Disabled
RAS Pulse Width Refresh : 4T RAS Pulse Width Refresh : 4T RAS Pulse Width Refresh : 4T RAS Pulse Width Refresh : 4T
RAS Precharge Time : 2T RAS Precharge Time : 2T RAS Precharge Time : 2T RAS Precharge Time : 2T
RAS to CAS Delay : 2T
RAS to CAS Delay : 2T RAS to CAS Delay : 2T
RAS to CAS Delay : 2T
ISA Bus Clock Fr
ISA Bus Clock Fr ISA Bus Clock Fr
ISA Bus Clock Frequency : PCICLK/4
equency : PCICLK/4 equency : PCICLK/4
equency : PCICLK/4
Starting Point of Paging: 1T
Starting Point of Paging: 1T Starting Point of Paging: 1T
Starting Point of Paging: 1T
SDRAM CAS Latency : 2T
SDRAM CAS Latency : 2T SDRAM CAS Latency : 2T
SDRAM CAS Latency : 2T
SDRAM WR Retire Rate : X SDRAM WR Retire Rate : X SDRAM WR Retire Rate : X SDRAM WR Retire Rate : X- -- -2 22 2- -- -2 22 2- -- -2 22 2
CPU to PCI Burst Mem. WR: Disabled CPU to PCI Burst Mem. WR: Disabled CPU to PCI Burst Mem. WR: Disabled CPU to PCI Burst Mem. WR: Disabled
System BIOS Cacheable : Disabled System BIOS Cacheable : Disabled System BIOS Cacheable : Disabled System BIOS Cacheable : Disabled
Video RAM Cacheable : Disabled Video RAM Cacheable : Disabled Video RAM Cacheable : Disabled Video RAM Cacheable : Disabled
Memory Hole at 15M Memory Hole at 15M Memory Hole at 15M Memory Hole at 15M- -- -16M : Disable 16M : Disable 16M : Disable 16M : Disabled dd d
AGP Aperture Size : 4MB AGP Aperture Size : 4MB AGP Aperture Size : 4MB AGP Aperture Size : 4MB
DRAM Controller 1 T WR : Enabled
DRAM Controller 1 T WR : Enabled DRAM Controller 1 T WR : Enabled
DRAM Controller 1 T WR : Enabled
DRAM Controller 1 T RD : Enabled
DRAM Controller 1 T RD : Enabled DRAM Controller 1 T RD : Enabled
DRAM Controller 1 T RD : Enabled
Concurrent function(MEM): Disabled
Concurrent function(MEM): Disabled Concurrent function(MEM): Disabled
Concurrent function(MEM): Disabled
Concurrent function(PCI): Concurrent function(PCI): Concurrent function(PCI): Concurrent function(PCI): Disabled Disabled Disabled Disabled
CPU Pipeline Control : Disabled CPU Pipeline Control : Disabled CPU Pipeline Control : Disabled CPU Pipeline Control : Disabled
PCI Delay Transaction : Disabled PCI Delay Transaction : Disabled PCI Delay Transaction : Disabled PCI Delay Transaction : Disabled
ESC : Quit ESC : Quit ESC : Quit ESC : Quit ↑↓← ↑↓← ↑↓← ↑↓← → → → → : Select Item : Select Item : Select Item : Select Item
F1 : Help PU/PD/+/
F1 : Help PU/PD/+/ F1 : Help PU/PD/+/
F1 : Help PU/PD/+/-
--
- : Modify
: Modify : Modify
: Modify
F5 : Old Values (Shift)F2 : Color
F5 : Old Values (Shift)F2 : Color F5 : Old Values (Shift)F2 : Color
F5 : Old Values (Shift)F2 : Color
F6 : Load
F6 : Load F6 : Load
F6 : Load Basic
Basic Basic
Basic Defaults
Defaults Defaults
Defaults
F7 : Load F7 : Load F7 : Load F7 : Load Best Best Best Best Defaults Defaults Defaults Defaults
Auto Configuration
Auto Configuration selects predetermined optimal values of chipset parameters. When Disabled,
chipset parameters revert to setup information stored in CMOS. Many fields in this screen are
not available when Auto Configuration is Enabled.
RAS Pulse Width Refresh
Select the number of CPU clock cycles allotted for the RAS pulse refresh, according to DRAM
specifications.
RAS Precharge Time
The precharge time is the number of cycles it takes for the RAS to accumulate its charge before
DRAM refreshes. If insufficient time is allowed, refresh may be incomplete and the DRAM may
fail to retain data.
RAS to CAS Delay
When DRAM is refreshed, both rows and columns are addressed separately. This setup item
allows you to determine the timing of the transition from RAS (row address strobe) to CAS
(column address strobe).