MIPI D-PHY Bandwidth Matrix Table
User Guide
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FPGA-UG-02041-1.1
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5.
Bandwidth and Data Rate
This section provides the definitions of terms used in video performance and summarizes the process of calculating
bandwidth and data transfer rate.
Pixel Clock
– the time base in MHz at which individual pixels are transmitted
Bandwidth
– the capacity required in Mbps of a given system to pass a specific frequency
Data Rate
– the data flow throughput in bits per second of the transport layer
5.1.
Bandwidth and Data Rate Calculation
5.1.1.
Pixel Clock
If the video format is standard, the pixel clock frequency can be obtained from the SMPTE/CEA or VESA standards. You
can also calculate the pixel clock frequency using the following equation:
Pixel Clock Frequency = Total Horizontal Samples * Total Vertical Lines * Refresh Rate
The Total Horizontal Samples and Total Vertical Lines include blanking period. The Refresh Rate may be referred to as
Frame Rate or Vertical Frequency
5.1.2.
Total Data Rate or Bandwidth
The bandwidth of a given video format is simply a product of the Pixel Clock Frequency and Pixel Size in bits. The total
data rate of the CMOS sensor interface must match the bandwidth.
Total Data Rate (Bandwidth) = Pixel Clock Frequency * Pixel Size (in bits)
5.1.3.
Data Rate per Lane
The per-lane data rate (Line Rate) is the total data rate (bandwidth) divided by the number of lanes. CSI-2 can support
up to four data lanes.
Data Rate per Lane = Total Data Rate (Bandwidth)/Number of Data Lane
5.1.4.
Bit Clock
Because the MIPI data lane is a Double Data Rate interface, the CSI-2 Bit Clock frequency is ½ of the Data Rate per Lane
Bit Clock Frequency = Data Rate per Lane/2
5.2.
Examples
5.2.1.
Example 1: 1920x1080p@60Hz, RAW10, 2-lane
Total Horizontal Samples = 2200, Total Vertical Lines = 1125
Pixel Clock Frequency = 2200 x 1125 x 60 = 148.5 MHz
Bandwidth (Total Data Rate) = 148.5 MHz * 10-bit = 1.485 Gbps
Line Rate (Data Rate per Lane) = 1.485 Gbps/2-lane = 742.5 Mbps
MIPI Bit Clock Frequency = 742.5/2 = 371.25 MHz
5.2.2.
Example 2: 3840x2160@30Hz, RAW8, 4-lane
Total Horizontal Samples = 4400, Total Vertical Lines = 2250
Pixel Clock Frequency = 4400 x 2250 * 30 = 297 MHz
Bandwidth (Total Data Rate) = 297 MHz * 8-bit = 2.376 Gbps
Line Rate (Data Rate per Lane) = 2.376 Gbps/4-lane = 594 Mbps
MIPI Bit Block Frequency = 594/2 = 297 MHz
