Lattice Semiconductor LatticeXP2 User Manual Download Page 1 | Manualshive

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May 2008

Revision: EB29_01.4

LatticeXP2 Standard Evaluation Board

User’s Guide

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Summary of Contents for LatticeXP2

Page 1: ...May 2008 Revision EB29_01 4 LatticeXP2 Standard Evaluation Board User s Guide...

Page 2: ...ase Locked Loops PLLs pre engineered source synchronous I O and enhanced sysDSP blocks For a full description of the LatticeXP2 FPGA see the Lattice website for data sheets technical notes technology...

Page 3: ...ities to the board Other features on the board are useful for evaluation of the LatticeXP2 FPGA or development of more complex solutions The A D D A and digital potentiometer are helpful for mixed sig...

Page 4: ...nverters The Bellnix BSV m is a point of load power supply Each point of load supply is placed physically near the DC load In this case the DC load of interest is the LatticeXP2 FPGA There are three B...

Page 5: ...es that can be supplied are shown in Table 2 Table 2 LatticeXP2 IO Voltage Selection Programmability There are three programmable devices on the board Of primary interest for the FPGA user is the Latt...

Page 6: ...d is expected to be the pri mary JTAG mode for most users The board can also be configured to access the LatticeXP2 FPGA and a chained evaluation board A 1x10 cable not supplied can be connected local...

Page 7: ...rd provides a 1x10 header J11 that permits an off chip SPI master to program the LatticeXP2 FPGA MachXO JTAG Connection The MachXO s primary function is to be the USB download cable interface for the...

Page 8: ...2 outputs The jumper on J15 can be moved from the default setting open to disable tri state all of the LatticeXP2 I Os Table 4 Global Output Enable Prototype Grid The board provides a small 100mil cen...

Page 9: ...tion the switch is tied to ground Table 8 SW1 Switch Pin Assignments Oscillator and Clock Inputs FPGA designs are almost without exception created with logic synchronous to some reference frequency Th...

Page 10: ...circuit board traces for these connections are nominally 50 ohm impedance Some of the differential I O pins are inputs to primary or PLL clock drivers If the built in oscillator in socket XU1 does not...

Page 11: ...g on any other sup ply The next voltage supply to be enabled is the 3 3V rail Once again the Power Manager waits for this rail to reach 95 threshold When the 3 3V rail reaches threshold the adjustable...

Page 12: ...rd Four 1x3 jumpers are provided on the board to permit reconfiguration of the RX TX RTS CTS connections Table 12 RS232 DB9 Pin Assignments The LatticeXP2 FPGA is connected to the RS232 DB9 connector...

Page 13: ...signal devices are all powered from the 3 3V supply The digital power for these devices comes directly from the 3 3V plane layer The analog power is supplied via a smaller independent 3 3V plane The i...

Page 14: ...ogic connected to the analog outputs The AIN2 input pin controls the range of the analog outputs AIN2 is connected to a test point adjacent to the A D converter described in the section above AIN2 is...

Page 15: ...ol systems Ordering Information POT Function LatticeXP2 I O CLK D15 Up Down_n C15 CS_n B14 Table 18 SRAM Connections SRAM Function LatticeXP2 I O SRAM Function LatticeXP2 I O SRAM Function LatticeXP2...

Page 16: ...ames are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice Date Version Change Summary May 2007 01 0 Initia...

Page 17: ...Bank2_12 RS232_1 XP2Bank2_13 CLK1 XP2Bank0_50 CLK0 XP2Bank0_2 SRAM_D15 XP2Bank5_35 SRAM_D14 XP2Bank5_36 SRAM_D12 XP2Bank5_37 SRAM_D10 XP2Bank5_42 SRAM_D8 XP2Bank5_43 SRAM_D9 XP2Bank5_26 SRAM_D13 XP2Ba...

Page 18: ...2 20 Page 3 Page 4 H1 XP2_BANK0_3 XP2Bank1_ 0 35 XP2Bank0_ 0 51 XP2Bank2_ 0 45 XP2Bank3_ 0 45 H3 XP2_BANK_4_7 XP2Bank4_ 0 37 XP2Bank5_ 0 52 XP2Bank6_ 0 45 XP2Bank7_ 0 45 LFXP217 U7E DI FPBGA484 LFXP2...

Page 19: ...G12 PT36A PT45A PT45A B17 PT35A PT44A PT44A F13 PT34B PT43B PT43B C14 PT34A PT43A PT43A E13 PT33B PT42B PT42B A17 PT33A PT42A PT42A B16 PT32B PT41B PT41B A16 PT31B PT40B PT40B G11 PT32A PT41A PT41A B1...

Page 20: ...4A PB23A PB23A T10 PB14B PB23B PB23B V10 PB15A PB24A PB24A V11 PB16A PB25A PB25A AA8 PB15B PB24B PB24B W11 PB16B PB25B PB25B AA9 PB17A PB26A PB26A AB2 PB17B PB26B PB26B AB3 PB18A PB27A PB27A AA11 PB18...

Page 21: ...F SM C_0603 DNI R101 4 7K SM R_0402 DI R101 4 7K SM R_0402 DI J33 CON10 HD10x1 DI J33 CON10 HD10x1 DI 1 2 3 4 5 6 7 8 9 10 J29 HEADER_3 HD3x1 DI J29 HEADER_3 HD3x1 DI 1 2 3 R98 470 SM R_0402 DI R98 47...

Page 22: ...8 0 1uF SM C_0402 DI C41 0 01uF SM C_0402 DI C41 0 01uF SM C_0402 DI C56 0 1uF SM C_0402 DI C56 0 1uF SM C_0402 DI C58 0 01uF SM C_0402 DI C58 0 01uF SM C_0402 DI C55 0 01uF SM C_0402 DI C55 0 01uF SM...

Page 23: ...0 SM R_0402 DI R36 470 SM R_0402 DI D4 GREEN_LED SM D_0603 DI D4 GREEN_LED SM D_0603 DI SW3 PUSHBUTTON SMT_SW DI SW3 PUSHBUTTON SMT_SW DI 1 4 2 3 R73 0 SM R_0603 DNI R73 0 SM R_0603 DNI R46 470 SM R_0...

Page 24: ...1uF SM C_0402 DI C88 0 1uF SM C_0402 DI TP72 TP TP72 TP TP22 TP TP22 TP R48 470 SM R_0402 DI R48 470 SM R_0402 DI R51 470 SM R_0402 DI R51 470 SM R_0402 DI C98 0 1uF SM C_0402 DI C98 0 1uF SM C_0402 D...

Page 25: ...HEADER_2X2 Header_2X2 DNI 3 4 1 2 R72 100 SM R_0603 DNI R72 100 SM R_0603 DNI R29 10K SM R_0402 DI R29 10K SM R_0402 DI CF Socket Normal J14 CF_2X30 DI CF Socket Normal J14 CF_2X30 DI GND 1 D3 2 D4 3...

Page 26: ...orporation 5555 NE Moore Ct Hillsboro OR 97124 B 10 20 GND GND 256K 128K 64Kx16 256Kx16 CY7C1041CV33 128Kx16 CY7C1011CV33 64Kx16 CY7C1021CV33 SRAM U11 TSOPII44 DI 256K 128K 64Kx16 256Kx16 CY7C1041CV33...

Page 27: ...Hillsboro OR 97124 B 11 20 Title Size Document Number Rev Date Sheet of Doc 000 Prototype Grid Lattice Semiconductor Corporation 5555 NE Moore Ct Hillsboro OR 97124 B 11 20 Title Size Document Number...

Page 28: ...4 7K DI SM R_0402 R9 4 7K DI SM R_0402 MH1 M_HOLE1 DI IW_MNT0 MH1 M_HOLE1 DI IW_MNT0 1 MH4 M_HOLE1 DI IW_MNT0 MH4 M_HOLE1 DI IW_MNT0 1 TP1 TP TP1 TP R2 4 7K DI SM R_0402 R2 4 7K DI SM R_0402 U1 ispPA...

Page 29: ...C8 5 6nF SM C_0603 DNI TP2 TP TP2 TP R13 1910_1 SM R_0402 DI R13 1910_1 SM R_0402 DI C14 22uF SM C_1210 DNI C14 22uF SM C_1210 DNI C11 10uF SM C_1206 DNI C11 10uF SM C_1206 DNI R25 10K_1 SM R_0603 DN...

Page 30: ...OR 97124 B 14 20 GND C49 22uF SM C_1210 DNI C49 22uF SM C_1210 DNI R80 10K_1 SM R_0603 DNI R80 10K_1 SM R_0603 DNI C45 5 6nF SM C_0603 DNI C45 5 6nF SM C_0603 DNI C29 10uF SM C_1206 DNI C29 10uF SM C...

Page 31: ...S VADJ R45 47 5K_1 SM R_0402 DI R45 47 5K_1 SM R_0402 DI R57 10K_1 SM R_0603 DNI R57 10K_1 SM R_0603 DNI C17 5 6nF DNI SM C_0603 C17 5 6nF DNI SM C_0603 R11 25K POT DNI R11 25K POT DNI C18 10uF DNI SM...

Page 32: ...O IFCLK CTL0 CTL1 CTL2 RDY1 RDY0 XO VCORE BYPASS XO VCCAUX BYPASS USB Reset GND 1 2 XO I O Hi Z 2 3 XO I O active XO TSALL XO JTAG header Page 17 TDO_XO TDI_XO TCK_XO TMS_XO C106 0 1uF SM C_0402 DI C1...

Page 33: ...R 97124 B 17 20 Title Size Document Number Rev Date Sheet of Doc 000 XO Power Lattice Semiconductor Corporation 5555 NE Moore Ct Hillsboro OR 97124 B 17 20 Page 18 Page 19 XO_640 common VCCIO VCCJ on...

Page 34: ...NC PT2B PT2D B3 PT2A PT3A PT3A A2 PT2B PT3B PT3B A3 NC PT2C PT3C D3 NC PT2D PT3D D4 PT2F PT4B PT4B C5 PT2E PT4A PT4A C4 PT2C PT3C PT5A D6 PT2D PT3D PT5B D5 PT3A PT3E PT5C B4 PT3B PT3F PT5D B5 NC PT4D...

Page 35: ...C PL3C PLL1T_IN F3 PL3B PL3D PL3D PLL1C_IN F4 PL2C PL4A PL4A LV_T E3 PL2D PL4B PL4B LV_C E2 NC PL4C PL4C C3 NC PL4D PL4D C2 PL2A PL5A PL5A LV_T B1 PL2B PL5B PL5B LV_C C1 PL3C PL5C PL6C D2 PL3D PL5D PL...

Page 36: ...re Ct Hillsboro OR 97124 B 20 20 Title Size Document Number Rev Date Sheet of 000 Placement Proposal Lattice Semiconductor Corporation 5555 NE Moore Ct Hillsboro OR 97124 B 20 20 XP2 Bellnix soic8 Bel...

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