Lattice Semiconductor LatticeXP2, User Manual

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15
LatticeXP2 Standard
Lattice Semiconductor Evaluation Board User’s Guide
Operation of the potentiometer is very simple. Whenever the CS is asserted (V
IL
) and a clock transition occurs, the
output voltage will change up/down by 1/128th. When the UP direction is requested, the output voltage will
increase.
Table 17. Digital Potentiometer Connections
SRAM
The evaluation board provides a quantity of asynchronous SRAM. The memory is organized as 256Kx32 providing
1Mbyte of storage. Asynchronous SRAMs provide a simple electrical and control interface eliminating the need for
more complex memory control systems.
Ordering Information
POT Function LatticeXP2 I/O
CLK D15
Up/Down_n C15
CS_n B14
Table 18. SRAM Connections
SRAM Function LatticeXP2 I/O SRAM Function LatticeXP2 I/O SRAM Function LatticeXP2 I/O
A0 W9 BE2 AA17 D14 AB6
A1 AB10 BE3 AB17 D15 AB5
A2 AA10 CE0 AB2 D16 W14
A3 Y11 CE1 Y14 D17 Y15
A4 W11 WE Y12 D18 W15
A5 W12 OE AB12 D19 Y16
A6 AA13 D0 V6 D20 Y17
A7 AA14 D1 W5 D21 W17
A8 AA15 D2 Y6 D22 Y18
A9 AA16 D3 W6 D23 W18
A10 AB16 D4 Y7 D24 Y22
A11 AB15 D5 Y8 D25 AA22
A12 AB14 D6 W8 D26 Y21
A13 AB13 D7 Y9 D27 AA21
A14 A12 D8 AB9 D28 AA20
A15 A11 D9 AA8 D29 AB20
A16 AB11 D10 AB8 D30 AB19
A17 AA9 D11 AA7 D31 AB18
BE0 AB4 D12 AB7
BE1 AB3 D13 AA6
Description Ordering Part Number
China RoHS Environment-Friendly
Use Period (EFUP)
LatticeXP2 Standard Evaluation Board LFXP2-17E-L-EV 10