Lattice Semiconductor ASC Bridge Board, User Manual

Page: 9 / 25

ASC Bridge Board
Evaluation Board User Guide
© 2015-2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal .
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02025-2.0 9
Table 8.2. J13 D-SUB 25 Connection
J13 Header
Pin Number
ASC Pin Function Header Connection Header Pin Number
1 GND — —
2 WDAT J2 11
3 RDAT J2 9
4 WRCLK J2 10
5 MANDATORY_RESET J2 28
6 GND — —
7 I2C_WRITE_EN J2 32
8 ASC_CLK J2 13
9 3.3 V — —
10 N.C. — —
11 12 V — —
12 5 V — —
13 GND — —
14 ASC_12V_OC_SHUTDOWN J2 14
15 ASC_12V_OC_SENSE J2 12
16 GND — —
17 ASC_RESET J2 7
18 I2C_SCL J2 18
19 I2C_SDA J2 16
20 ASC_5V_OC_SHUTDOWN J2 8
21 ASC_5V_OC_SENSE J2 6
22 ASC_BOARD_SENSE J2 4
23 12 V — —
24 5 V — —
25 5 V — —