Kontron SMARC-sAMX7, User Manual

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SMARC-sAMX7 User Guide. Rev. 1.9
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6.4. UART Interfaces
Use following UART interfaces with control signals of i.MX7.
Table 12: Mapping of SMARC SER interfaces to i.MX7 UARTs
SER UART
SER0 UART6
SER1 UART4
SER2 UART7
SER3 UART5
Table 13: UART interfaces for SER0 and SER2 (RX, TX, CTS#, RTS#)
UART6 UART7
UART6_CTS#//ECSPI1_SS0/H5
UART6_RTS#/ECSPI1_MISO/H4
UART6_RXD/ECSPI1_SCLK/H3
UART6_TXD/ECSPI1_MOSI/G5 UART7_CTS#/J6
UART7_RTS#/H6
UART7_RXD/J5
UART7_TXD/G6
depends on IO Pin muxing, table corresponds to Kontron default settings
NXP has defined the UART handshake lines in the opposite way from many other vendors. In the SMARC 2.0
specification RTS is defined as an output and CTS as an input. This is the same definition used by the standard PC
serial port.
However, in the iMX7 implementation RTS is an input and CTS is an output – i.e. the pin functions corresponding to
these names are swapped.
Per table 17 below, configuring the UART for DTE mode will result in the signals being routed to the SMARC pins in
conformance with the SMARC definition of the pin functions.
Table 14: UART interfaces for SER1 and SER3 (RX, TX)
UART4 UART5
UART4_RXD/SAI2_TXFS/D9
UART4_TXD/SAI2_TXC/D8 UART5_RXD/I2C4_SCL/L1
UART5_TXD/I2C4_SDA/L2
depends on IO Pin muxing, table corresponds to Kontron default settings
The DTE mode is designated for the SMARC-sAMX7 module. Following additional UART interfaces can be optionally
used:
 UART1 shares I2C1 at i.MX7 and I2C_LCD pins at SMARC 2.0 connector. They are only useable if display
converter (SN65DSI84ZQER) is not placed.
 UART2 shares SPI[4]_Master Input, Slave Output/Master Output, Slave Input (MISO/MOSI) at i.MX7 and
GPIO7/GPIO8 pins at SMARC 2.0 connector. They are only useable if APPROTECT key does not use SPI option
with additional resistors and omit SPI level shifter TXB0104RUT.
 UART3 shares 2x GPIOs at i.MX7 and GPIO9/GPIO10 pins at SMARC 2.0 connector.