Kontron PCI-AOB16/12, User Manual

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PCI-AOB8/12 (16/12) User’s Guide
You can perform two types of operations with the readback command. When CNT=0, the counters
selected by C2 through C0 are latched simultaneously. When STA=0, the counter status byte is
read when the counter I/O location is accessed. The counter status byte provides information
about the current output state of the selected counter and its configuration. The status byte
returned if STA=0 is:
OUT: Current state of counter output pin
NC: Null count. This indicates when the last count loaded into the counter register has
been loaded into the actual counter. The exact time of load depends on the
configuration selected. Until the count is loaded into the counter, it cannot be
read.
RW1, RW0: Read/Write command
M2, M1, M0: Counter mode
BCD:
BCD = 0 is binary mode, otherwise counter is in BCD mode
If both STA and CNT bits in the readback command byte are set low and the RW1 and RW0 bits
have both been previously set high in the counter control register (thus selecting two-byte
reads), reading a selected counter address location will yield:
1st Read: Status byte
2nd Read: Low byte of latched data
3rd Read: High byte of latched data
After any latching operation on a counter, the contents of its hold register must be read before
any subsequent latches of that counter will have any effect. If a status latch command is issued
before the hold register is read, the first read will read the status, not the latched value.
B7 B6 B5 B4 B3 B2 B1 B0
OUT NC RW1 RW2 M2 M1 M0 BCD