Kontron PCI-AOB16/12, User Manual

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5-4
PCI-AOB8/12 (16/12) User’s Guide
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Timer Update Mode
Timer Update Mode is similar to Simultaneous Update Mode, except that updates are issued by
the counter/timer (programmed in mode 2 or mode 4 per Chapter 6, “8254 Counter/Timer”). A
read from Base 5 will change the card from Simultaneous Update Mode to Timer Update
Mode, and a read from Base 6 will change it back. The counter-generated update pulse
is also available at the 40-pin header connector(OUT2) to synchronize external devices and can
generate interrupts for synchronized loading if enabled by a read from Base 3.
(Interrupts are disabled by a read from Base 4.)
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Restrict-Output-Voltage
Limits the output of all DAC channels. This is done by reading Base AE. The previous
outputs will be restored when a "Clear Restrict-Output-Voltage" command is issued by a read of
Base F.
*
Table 5-1. Register Map
* Although it is possible to write the low and high bytes separately as shown above, it is much easier to write
both bytes with a single OUT DX, AX instruction. In that case, only even addresses are written.
Address Write * Read
Base + 0 DAC 0 Low Byte Place card in Simultaneous Mode without
updating outputs
Base + 1 DAC 0 High Byte
Base + 2 DAC 1 Low Byte Release card from Simultaneous Mode without
updating outputs
Base + 3 DAC 1 High Byte Enable interrupts
Base + 4 DAC 2 Low Byte Disable interrupts
Base + 5 DAC 2 High Byte Enable timer-initiated DAC update
Base + 6 DAC 3 Low Byte Disable timer-initiated DAC update
Base + 7 DAC 3 High Byte