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PCI-AOB8/12 (16/12) User’s Guide
The DAC outputs are undefined at power-up. Therefore, in order to prevent excessive outputs to
external circuits, the PCI-AOB8/12 (16/12) contains automatic circuits that set D/A outputs to
less than 15 percent of span at system power-on. Upon power-up, the card is not in the
Simultaneous Update mode.
After all DACs have been loaded with the desired values, a software command can be used to
switch the reference voltage to its normal value. Similarly, a software command can be used at
any time to set the reference voltage to 15 percent, causing all DAC outputs to be equal to
15 percent of each DAC’s programmed value.
These cards contain a type 8255-5 programmable peripheral interface (PPI) chip providing
24 bits of parallel digital input/output. They can be programmed to accept inputs or to provide
outputs on three 8-bit ports designated Ports A, B, and C. Port C can be further divided into two
4-bit nibbles.
Each I/O line is buffered by a type 74LS245 tristate buffer transceiver capable of sourcing 15 mA
or sinking 24mA (64 mA on request as a factory installed option). Pull-ups on the card assure
that there are no erroneous outputs at power up. The buffers are configured automatically by
hardware logic for input or output according to direction assignment from a control register in
the PPI.
The PCI-AOB8/12 (16/12) contains a type 82C54 counter/timer which has three 16-bit
programmable down counters. Counter/Timer #0 and Counter/Timer #1 are configured for event
counting. Counter/Timers #1 and #2 are concatenated and form a 32-bit counter/timer for
frequency generation. The dual counter/timer is clocked by a 1 MHz crystal oscillator and may be
gated on/off by a CMOS level signal at the connector. The counters can also be programmed to
provide a “clock-tick” interrupt and update of the DAC buffers for more precisely timed outputs.
Summary of Contents for PCI-AOB16/12
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Page 46: ...Chapter 4 Address Selection...
Page 66: ...Chapter 7 Software...
Page 68: ...Chapter 8 Calibration...