Software Setups
3-17
3.5.5. Watchdog
The function of a watchdog is to reset the CPU board if the processor is not able to
generate a trigger for longer than the watchdog time-out period. This feature is useful in
embedded systems where human supervision is not required or impossible.
The PCI-946-1 and P3S440BX provide a two-stage digital watchdog with software
programmable time-out period.
Following a reset of any source, the watchdog is disabled. The watchdog can be enabled by
software.
Dual Stage Watchdog
Enabling the Programmable Watchdog
To enable the programmable watchdog, first unlock the enable bit by clearing the lock bit
in register n92h (bit 2), then set the bit WDEN (bit 7) in register n96h and relock it by
setting the lock bit in register n92 (bit 2). The following is an example in C language:
#define TekReg 0x190
// define base address (0x190, 0x290 or 0x390)
void ArmWatchdog(void)
{
outp(2, inp(2) & 0xFB);
// unlock watchdog enable bit
outp(6, inp(6) | 0xF0);
// enable and trigger at max time-out
outp(2, inp(2) | 0x04);
// lock watchdog enable bit
}
Triggering the Programmable Watchdog
To trigger the programmable watchdog, the processor writes to register n96h (n=1, 2 or 3).
The action of writing to the register is the trigger and the value written to the register tells
the watchdog the current time-out to use (see register n96h description). For a fixed time-
out, the software simply writes a constant in register n96h.
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