PCI-946-1 and P3S440BX Technical Reference manual
3-8
3.3.7. Register x97h: NMI sources & mask
Bit
7
6
5
4
3
2
1
0
Reset
0
0
0
Read
BatFltEn
BatFlt
FanFlt
FanFlt En
WdNmiEn
WdNmi
Write
BatFltEn
FanFlt En
WdNmiEn
Not used by the BIOS, except when the Whatchdog option is enabled and after POST.
WdNmi
Watchdog NMI: NMI from the Watchdog timeout.
WdNmiEn
Enable NMI from the Watchdog.
BatFlt
Battery Fault: NMI from power failure detection.
BatFltEn
Enable NMI from BatFlt.
FanFlt
Fan Fault: NMI from CPU fan failure detection
FanFltEn
Enable NMI from FanFlt
All bits are active "1" regardless of the electrical state of the signal. Inversion is provided
by the hardware when required. When an NMI source is enabled, the corresponding event
is latched until the enable bit is cleared. When the enable bit is cleared, the status bit
reflects the signal (not latched).
The NMI itself is generated through the IOCHK* signal. As a result, it can be monitored
on the ISA backplane, and the NMI handler must reset the IOCHK* latch.
✎
NOTE
When a watchdog NMI occurs, the CPU must trigger or disable the
watchdog within 1ms or the watchdog will generate a master reset.
Knowing that an NMI is the highest priority interrupt on the CPU, if the CPU
cannot answer the NMI within 1ms then there is a major problem and the
best thing to do is to reset everything. Normally, the CPU will answer the NMI
and re-trigger the watchdog for the time it needs to shut down properly.
* = Active low signal
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