886LCD-M Family
KTD-00474-E
Public User Manual
Date: 2005-05-24
Page
30 of 78
Signal Description – AGP Connector:
Signal
Description
Address
PIPE#
Pipelined Read:
This signal is asserted by the AGP master to indicate a full width address is to
be enqueued on by the target using the
AD
bus. One address is placed in the AGP request
queue on each rising clock edge while
PIPE#
is asserted. When
PIPE
# is deasserted no new
requests are queued across the AD bus.
During SBA Operation:
This signal is
not used
if SBA (Side Band Addressing) is selected.
During FRAME# Operation:
This signal is
not used
during AGP FRAME# operation.
PIPE#
is a sustained tri-state signal from masters (graphics controller), and is an input to the
GMCH
ADD_ID[7:0]
Side-band Address:
These signals are used by the AGP master (graphics controller) to pass
address and command to the GMCH. The
SBA
bus and AD bus operate independently. That is,
transactions can proceed on the
SBA
bus and the AD bus simultaneously.
During PIPE# Operation:
These signals are
not used
during PIPE# operation.
During FRAME# Operation:
These signals are
not used
during AGP FRAME#
operation.
NOTE:
When sideband addressing is disabled, these signals are isolated (no external/internal
pull-ups are required).
Flow control
RBF#
Read Buffer Full:
Read buffer full indicates if the master is ready to accept previously requested
low priority read data. When
RBF#
is asserted the GMCH is not allowed to initiate the return low
priority read data. That is, the GMCH can finish returning the data for the request currently being
serviced.
RBF#
is only sampled at the beginning of a cycle. If the AGP master is always ready to
accept return read data then it is not required to implement this signal.
During FRAME# Operation:
This signal is not used during AGP FRAME# operation.
WBF#
Write-Buffer Full:
indicates if the master is ready to accept Fast Write data from the GMCH.
When
WBF#
is asserted the GMCH is not allowed to drive Fast Write data to the AGP master.
WBF#
is only sampled at the beginning of a cycle. If the AGP master is always ready to accept
fast write data then it is not required to implement this signal.
During FRAME# Operation:
This signal is not used during AGP FRAME# operation.
AGP Status
ST[2:0]
Status:
Provides information from the arbiter to an AGP Master on what it may do.
ST[2:0]
only
have meaning to the master when its
GNT#
is asserted. When
GNT#
is deasserted these signals
have no meaning and must be ignored.
ST[2:0 Meaning
000
Previously requested low priority read data is being returned to the master
001
Previously requested high priority read data is being returned to the master
010
The master is to provide low priority write data for a previously queued write command
011
The master is to provide high priority write data for a previously queued write command
100
Reserved
101
Reserved
110
Reserved
111
The master has been given permission to start a bus transaction. The master may queue
AGP requests by asserting
PIPE#
or start a PCI transaction by asserting
FRAME#
.
AGP Strobes
ADSTB[0]
Address/Data Bus Strobe-0:
provides timing for 2x and 4x data on
AD[15:0]
and
C/BE[1:0]#
signals. The agent that is providing the data will drive this signal.
ADSTB#[0]
Address/Data Bus Strobe-0 Complement:
With AD STB0, forms a differential strobe pair that
provides timing information for the
AD[15:0]
and
C/BE[1:0]#
signals. The agent that is providing
the data will drive this signal.
ADSTB[1]
Address/Data Bus Strobe-1:
Provides timing for 2x and 4x data on
AD[31:16]
and
C/BE[3:2]#
signals. The agent that is providing the data will drive this signal.
ADSTB#[1]
Address/Data Bus Strobe-1 Complement:
With AD STB1, forms a differential strobe pair that
provides timing information for the AD[15:0] and C/BE[1:0]# signals in 4X mode. The agent that
is providing the data will drive this signal.
SBSTB
Sideband Strobe:
Provides timing for 2x and 4x data on the
SBA[7:0]
bus. It is driven by the
AGP master after the system has been configured for 2x or 4x sideband address mode.
SBSTB#
Sideband Strobe Complement:
The differential complement to the
SB_STB
signal. It is used to
provide timing 4x mode.
(continued)