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Keysight Technologies N8241A, User Manual

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Keysight Technologies N8241A User Manual Download Page 118

Chapter 7

119

Technical Characteristics

Trigger In*

•

Trigger impedance: 4k ohms

•

Trigger level:LVTTL

*Trigger In has additional latency.

LXI Trigger Bus

•

All physical and electrical characteristics conform to LXI Standard Revision 
1.1.

External markers

Markers can be defined for each waveform segment.

Front Panel

Markers 1/2/3/4

•

Number of outputs: 4 SMB female front-panel connectors

•

Marker polarity: Negative, positive 

•

Output type: 3.3V CMOS with 30 ohm series termination

•

Marker low level: 100 mV nominal (high impedance load)

•

Marker high level: 3.2V nominal (high impedance load)

•

Marker timing resolution: Clock/8 (6.4 ns at full rate)

•

Marker delay: resolution of 1 sample clock

•

Marker width: resolution of 1 SYNC clock 

Trigger Out*

•

Output type:5V TTL with 50 ohm termination

•

Marker low level: 100 mV nominal (high impedance load)

•

Marker high level: 4.9V nominal (high impedance load)

Summary of Contents for N8241A

Page 1: ...anual Get Pricing Availability at ApexWaves com Call Today 1 800 915 6216 Email sales apexwaves com https www apexwaves com signal generators keysight technologies high performance arbitrary waveform...

Page 2: ...Copyright 2006 2015 Keysight Technologies Inc NOTICE In August 2014 Agilent Technologies former Test and Measurement business became Keysight Technologies This document is provided as a courtesy but i...

Page 3: ...eparate agreement shall control Technology Licenses The hardware and or software described in this document are furnished under a license and may be used or copied only in accordance with the terms of...

Page 4: ...adhered to could result in injury or loss of life Do not proceed beyond a warning note until the indicated conditions are fully understood and met CAUTION Caution denotes a hazard It calls attention...

Page 5: ...d in a normal condition in which all means for protection are intact only WARNING No operator serviceable parts inside Refer servicing to qualified personnel to prevent electrical shock do not remove...

Page 6: ...posal Reference WEEE Directive 200 96 EC The CE mark shows that the product complies with all relevant European Legal Directives The C Tick mark is a registered trademark of the Australian Communicati...

Page 7: ...owing Internet URL http www agilent com find synthetic Compliance This product has been designed and tested in accordance with accepted industry standards and has been supplied in a safe condition The...

Page 8: ...7...

Page 9: ...8...

Page 10: ...Systems 24 Required Software 24 N8241 2A Installation 24 Installing the Instrument 24 Installing the Software 25 Connecting to the AWG over the LAN 26 Verifying System Operation 29 System Set Up 29 W...

Page 11: ...ve Unit 49 Initiating Synchronous Playback 50 Using Programmatic Interfaces 51 IVI C Driver Functionality 51 MATLAB Interface 51 MATLAB Example 1 Creating and Playing a Waveform 52 MATLAB Example 2 Sy...

Page 12: ...81 Synchronous Triggers 82 Signal Conditioning 84 Single Ended Mode 84 Differential Mode 85 Digital Predistortion 86 Multiple Module Synchronization 87 Synchronization Using an Internal Clock 87 Synch...

Page 13: ...n 99 Configuring the Signal Conditioning Path 99 Configuring the Clock 100 Configuring the Sequencer 101 Out of Range Input Values 105 Theory of Operation 108 6 Troubleshooting Software 112 Removing t...

Page 14: ...A 10 bits Both AWGs offer dual differential output channels to drive both single ended and balanced designs The AWGs include a complete software suite to speed waveform development and system integrat...

Page 15: ...1 25 GS s Refer to External Clock on page 69 for more information 2 INT CLK OUT Use this 50 ohm SMA connector to route the internal 1 25 GS s clock to other test instrument or devices 3 AUX 10 MHz REF...

Page 16: ...rved for future applications 8 TRIGGERS 1 2 3 4 There are four SMB female trigger input connectors that are used to control the waveforms in the sequencer and create event based signal simulation The...

Page 17: ...ddress Subnet Mask is set to 255 255 0 0 DHCP is set to ON Auto IP is set to ON The instrument hostname is set to A N82XXA NNNNN where N82XXA is the instrument model number such as N8241A and NNNNN re...

Page 18: ...Power Solid Amber ON Power is on Solid Green State LAN Status Illumination ON Normal Operation Solid Green ON Device Identity Needs initialization refer to Initializing the LAN Configuration on page...

Page 19: ...es State Clock Status Illumination OFF Not synchronized None ON Synchronized clock is IEEE 1588 Slave Solid Green ON Synchronized clock is IEEE 1588 Master Blinking Green once every second ON Synchron...

Page 20: ...easurements and other operations Outbound events are used to notify other LXI devices of specific conditions An LXI TRIG BUS cable and terminators will be available from Circuit Assembly in the near f...

Page 21: ...sensitive components in your instrument ESD damage is most likely to occur as the instrument is being installed or when cables are connected or disconnected Protect the circuits from ESD damage by we...

Page 22: ...he AWG parameters making it easy to configure signal output Each tab is labeled with its contents enabling quick access to all functions Figure 1 3 displays the first level of the GUI For more informa...

Page 23: ...r greater with Patch 2 download from www agilent com N8241 2A Installation Installing the Instrument 1 Plug the AWG module into the mains power supply NOTE Install the instrument so that the detachabl...

Page 24: ...2 3 for Windows 2000 NT XP HWDRIVER Support National Follow the instructions for the Download Process at the bottom of the page 4 Download the Agilent IO Libraries Suite 14 1 with Patch 2 Go to http w...

Page 25: ...l work only if Agilent VISA is operating as the primary VISA driver If it is operating as the secondary driver and another VISA such as NI VISA is the primary you will need to add the N8241 2A using t...

Page 26: ...Chapter 1 27 Introducing the N8241 2A AWGs Getting Started 4 Enter the host name of the AWG in the LAN Instrument secondary window 5 Click OK...

Page 27: ...28 Chapter 1 Introducing the N8241 2A AWGs Getting Started 6 The AWG is now configured to the PC...

Page 28: ...e supply voltage is in the specified range Waveform Generation NOTE An Agilent E4440A Spectrum Analyzer or equivalent is required to view the waveforms 1 Connect the channel 1 positive output to the s...

Page 29: ...figured correctly In the Quick Play section of the user interface browse and select the 400MHzTone bin waveform file found on the CD for channel 1 and 2 6 Click Play The spectrum analyzer cabled to ch...

Page 30: ...WGs Verifying System Operation Figure 1 4 N8241A Playback of a 400 MHz Tone Figure 1 5 N8242A Playback of a 400 MHz Tone 7 You should get the same performance when you connect channel 2 positive to th...

Page 31: ...32 Chapter 1 Introducing the N8241 2A AWGs Shutting Down the System Shutting Down the System 1 Close the N8241A Control Utility 2 Toggle the front panel switch to place the AWG module in standby mode...

Page 32: ...may be harmful if absorbed through the skin Wash thoroughly after handling In case of spill soak up with sand or earth Flush spill area with water Dispose of isopropyl alcohol in accordance with all...

Page 33: ...34 Chapter 1 Introducing the N8241 2A AWGs Maintenance...

Page 34: ...ions on how to complete this task Using the Graphical User Interface 36 Generating a Single Tone Signal 36 Generating a Multi tone Signal 40 Creating and Playing a Sequence 43 Synchronizing Two N8241...

Page 35: ...eters need to be set prior to waveform playback NOTE A spectrum analyzer is required to display the waveforms 1 Connect the channel 1 positive output to the spectrum analyzer RF input connector 2 Open...

Page 36: ...gnal conditioning path to CH1 OUT click on the node that you want to connect The connection will automatically enable differential mode Click on the negative node to enable single ended mode Notice th...

Page 37: ...eform The AWG accepts data formatted as 16 bit signed integers ignoring the LSB NOTE Different waveforms can be loaded into channel 1 and 2 but the length of the waveforms must be the same 8 Use the d...

Page 38: ...hapter 2 39 Basic Operation Using the Graphical User Interface N8241A and greater than 50 0 dBc for the N8242A Figure 2 1 N8241A Playback of a 100 MHz Tone Figure 2 2 N8242A Playback of a 100 MHz Tone...

Page 39: ...the Output tab and connect a single ended signal conditioning path to CH1 OUT click on the node that you want to connect The connection will automatically enable differential mode Click on the negativ...

Page 40: ...default setting for the Play Mode and Predistortion 7 Click Play For this example a waveform with five tones was used The intermodulation distortion produced by the five tones played back on the N8241...

Page 41: ...42 Chapter 2 Basic Operation Using the Graphical User Interface Figure 2 3 N8241A Playback of Five Tones Figure 2 4 N8241A Playback of Five Tones...

Page 42: ...the Output tab and connect a single ended signal conditioning path to CH1 OUT click on the node that you want to connect The connection will automatically enable differential mode Click on the negati...

Page 43: ...d select the 500 MHz waveform then click OK NOTE For dual channel sequencing add the same waveform to both channel 1 and channel 2 Currently the software does not support independent channel sequencin...

Page 44: ...and 11 for the 100 MHz and two tone waveforms 13 In the Sequence Definition area select segment ID 2 and move it below ID 3 using the down arrow 14 Click Modify and change the count to 50000 The sequ...

Page 45: ...46 Chapter 2 Basic Operation Using the Graphical User Interface Figure 2 6 N8241A Playback of a Sequence...

Page 46: ...ple clock cable delays between the modules will result in the same skew in the analog outputs The sample clock signal is split with a matched passive divider and the cable lengths are matched The resu...

Page 47: ...48 Chapter 2 Basic Operation Using the Graphical User Interface Figure 2 7 Cabling for Two AWG Synchronization 3 Turn the system on...

Page 48: ...Window 3 Select the desired signal conditioning path 4 Select the desired waveform file 5 Select the Clock tab 6 From the SYNC CLK IN drop down list select Master Notice the following changes to the...

Page 49: ...changes to the graphical user interface that are automatically configured when the Slave unit is assigned Clock Tab the internal clock is disabled the sample clock is driven by the external clock in...

Page 50: ...d Attributes can be found in the N8241A Help system Go to Start Programs Agilent N8241A Help or from the application menu bar Help N8241A Online Help MATLAB Interface MATLAB is one of the programmatic...

Page 51: ...are changed after downloading the waveform the waveform must be re downloaded Create a waveform a sine wave with 2000 pts Played at 1250 MHz this will produce a tone of 1 250 MHz numberOfSamples 2000...

Page 52: ...ARB mode errorN errorMsg agt_awg_setstate instrumentHandle outputmode arb if errorN 0 An error occurred while trying to set the ARB mode disp Could not set the instrument to ARB mode return end disp T...

Page 53: ...e disp Session to the instrument closed successfully MATLAB Example 2 Synchronizing Two N8241 2A AWGs MATLAB Example 2 Synchronizing Two AWG Modules N6030 Matlab Interface Version 1 12 Copyright C 200...

Page 54: ...inst0 INST R if errorN 0 disp errorN disp errorMsg disp program stopped return else disp ok end instrumentHandle1 errorN errorMsg agt_awg_open TCPIP TCPIP0 A N8241 90XXX inst0 INSTR if errorN 0 disp...

Page 55: ...Msg agt_awg_setstate instrumentHandle2 outputenabled true if errorN 0 disp errorN disp errorMsg disp program stopped return else disp ok end disp Setting the instrument to ARB mode errorN errorMsg agt...

Page 56: ...orN disp errorMsg disp program stopped return else disp ok end disp Setup the Master errorN errorMsg agt_awg_setstate instrumentHandle1 syncmode master if errorN 0 disp errorN disp errorMsg disp progr...

Page 57: ...formHandle errorN errorMsg agt_awg_storewaveform instrumentHandle1 waveform if errorN 0 disp errorN disp errorMsg disp program stopped return else disp ok end waveformHandle errorN errorMsg agt_awg_st...

Page 58: ...N disp errorMsg disp program stopped return else disp ok end errorN errorMsg agt_awg_playwaveform instrumentHandle1 waveformHandle if errorN 0 disp errorN disp errorMsg disp program stopped return els...

Page 59: ...Interfaces else disp ok end errorN errorMsg agt_awg_initiategeneration instrumentHandle1 if errorN 0 disp errorN disp errorMsg disp program stopped return else disp ok end disp Press ENTER to close t...

Page 60: ...in ch2 since predistortion is applied twice once when it was downloaded to ch1 and again when it is downloaded to ch2 You can eliminate this problem by turning off the predistortion before downloading...

Page 61: ...GN6030A_init resourceName IDQuery resetDevice session if rc VI_SUCCESS return 1 Setup some Channel 1 states Set to single ended operation filter on 500 MHz filter selected rc AGN6030A_ConfigureOutputC...

Page 62: ...ront panel 10MHz REF IN connection To use the PCI backplane clock substitute AGN6030A_VAL_REF_CLOCK_PXI rc AGN6030A_ConfigureRefClockSource session AGN6030A_VAL_REF_CLOCK_EXTERNAL if rc VI_SUCCESS ret...

Page 63: ...do this call the function twice and discard the second waveform handle if Channel 2 is not used rc AGN6030A_CreateArbWaveform session WFM_LENGTH ifWfm wfmHandle1 if rc VI_SUCCESS return 1 rc AGN6030A_...

Page 64: ...Chapter 2 65 Basic Operation Using Programmatic Interfaces...

Page 65: ...66 Chapter 2 Basic Operation Using Programmatic Interfaces...

Page 66: ...functionality of the N8241A and N8242A Arbitrary Waveform Generators N8241 2A Block Diagram 68 Clock I O 69 Waveform Playback 70 Basic Sequencing 71 Advanced Sequencing 72 Markers 79 Triggers 80 Sync...

Page 67: ...15 bits of vertical resolution and the N8242A 10 bits The DACs are fully differential and the AWGs support both single ended and differential outputs through the analog signal conditioning path The A...

Page 68: ...ble even when an external clock is used External Clock An external sample clock can be input through the EXT CLK IN connector The external sample rate must be within the range of 100 MS s and 1 25 GS...

Page 69: ...y enables the construction of long waveforms from shorter or repeated segments responds to external triggers offers several modes of segment advance outputs markers Sequence Play Table The play table...

Page 70: ...m segments This is helpful when constructing long waveforms with repeating segments A long waveform might consist of repetitive data that can be stored as single segments and repeated in the sequencer...

Page 71: ...back Scenario Pointer Source There are two ways to choose which sequence to play Index A register is written to by the host processor that addresses entries in the sequence play table This register ca...

Page 72: ...inter does not change a Start trigger or Jump trigger causes the scenario to play again If the scenario pointer changes the next Start trigger or Jump trigger will start the new scenario The effect of...

Page 73: ...74 Chapter 3 Theory of Operation Waveform Playback Figure 3 2 Advanced Sequencer Flow Chart Figure 3 3...

Page 74: ...ition count is one a single trigger will advance to the next waveform While waiting for a trigger the last value of the waveform loop continues to play Repeat The waveform loop repeats until the numbe...

Page 75: ...start a scenario or to jump to a new scenario using one of five inputs There are four external trigger inputs and a host trigger source The host trigger source is a register in the play table that can...

Page 76: ...Chapter 3 77 Theory of Operation Waveform Playback Figure 3 3 Waveform Play Flow Chart...

Page 77: ...78 Chapter 3 Theory of Operation Waveform Playback Figure 3 4 Scenario and Sequence Play Flow Charts...

Page 78: ...g The following markers can be enabled Ch 1 Memory Marker 1 and Memory Marker 2 Ch 2 Memory Marker 1 and Memory Marker 2 Waveform Start Repeat and Gate Sequence Start Repeat and Gate Scenario Repeat S...

Page 79: ...ay function uses the input value to calculate the delay to the nearest 1 4 SYNC clock cycle The sequencer is capable of outputting nine markers which can be multiplexed to the four marker outputs The...

Page 80: ...layback at the beginning of the waveform Hold holds at the end of the waveform Stop stops playback Resume resumes playback at the point in the waveform that play was held or stopped The Waveform Advan...

Page 81: ...clock edge and Twin_up the minimum trigger setup before the next SYNC clock edge These are specified for the trigger input relative to the SYNC clock output The trigger must be a minimum of two SYNC c...

Page 82: ...tput level of up to 0 5Vp p This mode gives the greatest single ended signal fidelity because there is a balun in the path that suppresses the second order harmonic Active mode has an output level of...

Page 83: ...oltage is also obtained without the use of the amplifier To preserve signal purity the active amplifier cannot be used in differential mode Differential mode is not recommended when driving single end...

Page 84: ...sponse of the reconstruction filter The correction method uses filters to level the amplitude response and to create a linear phase response at the front panel of the AWG This process attenuates the s...

Page 85: ...iple modules will result in the same skew in the analog outputs Typically the sample clock signal is split with a matched passive splitter and the cable lengths are matched to better than 5 mm The res...

Page 86: ...es where the SYNC clock out is unconnected The multiple AWGs are configured to have an internal start trigger to begin play A software start marker event is used to initiate the synchronized play Mark...

Page 87: ...the AWG waveforms The SYNC clock is used internal to the AWG to clock the internal data generator and to clock in the synchronous triggers When using the internal clock the SYNC clock has a frequency...

Page 88: ...Chapter 3 89 Theory of Operation Multiple Module Synchronization Figure 3 9 Cabling Using and External Clock...

Page 89: ...e minimum trigger setup before the next SYNC clock edge These are specified for the trigger Input relative to the SYNC clock Output The trigger must be a minimum of two SYNC clock cycles long The trig...

Page 90: ...r and f is the sample clock frequency in MHz It should be noted that n is the number of 1 2 SYNC clock cycles of total delay between the modules This can also be expressed in terms of delay Expressed...

Page 91: ...92 Chapter 3 Theory of Operation Multiple Module Synchronization...

Page 92: ...ess up to eight thousand previously stored scenarios through a 16 bit interface This functionality gives you the ability to build custom signal scenarios to simulate dynamically changing environments...

Page 93: ...then in real time provide the scenario handles through the AUX PORT input connector NOTE The dynamic sequencing option is only available through the programmatic interfaces since it operates in the ad...

Page 94: ...uencing Figure 4 2 AUX PORT Pin Outs Table 4 1 Pin Assignment Pin No Signal Assignment 1 Trigger 2 Ground 3 Data Valid 4 CH 1 CH 2 Reserved set low 5 D0 6 D1 7 Ground 8 D2 9 D3 10 D4 11 D5 12 D6 13 D7...

Page 95: ...e being written to the AUX port For example to play the scenario with a handle of 72 write the value 36 to the AUX port All scenario handles are even numbers Data Valid When Data Valid is asserted hig...

Page 96: ...ms in the AWG memory and then modify the behavior of the waveforms with profiles for amplitude phase and frequency modulations Direct Digital Synthesis Using the Control Utility 99 Configuring the Equ...

Page 97: ...ol Utility graphical user interface GUI or one of the supported programmatic interfaces Accessing DDS through the GUI is the easiest way to view the functionality as many details are handled by the so...

Page 98: ...trum analyzer to the AWG front panel connector If you are using a PXI chassis use the backplane 10MHz reference 2 Connect the channel 1 positive output to the spectrum analyzer RF input connector Sele...

Page 99: ...atically enable differential mode Click on the negative node to open this path and enable single ended mode Configuring the Clock 1 Select the Clock tab and configure the 10MHz REF IN For this example...

Page 100: ...om the Segment List select Add This brings up a Segment Information window 3 Browse and select the DDS_All_Ones waveform from the Demo Waveform DDS folder included on the N8241A Series CD or the memor...

Page 101: ...102 Chapter 5 Direct Digital Synthesis Option 330 Direct Digital Synthesis 4 In the Segment List select the DDS_All_Ones waveform...

Page 102: ...r 5000 repetitions and accept all default settings Click OK NOTE The values entered in the DDS Sequence Input window are recorded in the sequence definition area of the Sequencer tab This enables you...

Page 103: ...104 Chapter 5 Direct Digital Synthesis Option 330 Direct Digital Synthesis Figure 5 2 Sequencer Tab 9 Click Download Play The spectrum of the sequence should be similar to the one shown in Figure 5 3...

Page 104: ...nce The 250 MHz carrier marker 1 and the 400 MHz carrier marker 2 are combined with a waveform composed of all ones This illustrates how the DDS engine produces sine waves when a constant frequency is...

Page 105: ...ce the question marks in the Frequency Slope box This is occurs when the combination of the loop count the initial frequency and the end frequency cannot be calculated correctly If you select OK a mes...

Page 106: ...l Synthesis Option 330 Direct Digital Synthesis Figure 5 6 Calculated Valid Settings The end frequency value was adjusted to enable the slope count NOTE This type of out of range condition may also oc...

Page 107: ...be stored in waveform memory along with the modulation limited playback time can be achieved Another important example of a frequency domain waveform is wideband radar chirps Again the waveform consi...

Page 108: ...ypassed The sine and cosine outputs of the DDS and the interpolated outputs of waveform memory are sent to a complex or I Q modulator for upconversion If the channel 1 interpolated memory is represent...

Page 109: ...110 Chapter 5 Direct Digital Synthesis Option 330 Theory of Operation Figure 5 7 DDS...

Page 110: ...leshooting The following topics are included in this chapter Software 112 Removing the Software 112 Moving the Software 112 Updating the Software 112 Initializing the LAN Configuration 113 Contacting...

Page 111: ...necessary to move the N8241A software complete the instructions documented in Removing the Software Then using the N8241A CD reinstall the software where it is needed Updating the Software To resolve...

Page 112: ...same default IP address Subnet Mask is set to 255 255 0 0 DHCP is set to ON Auto IP i set to ON The instrument hostname is set to A N82XXA NNNNN where N82XXA is the instrument model number such as N82...

Page 113: ...495 Europe tel 31 20 547 2323 fax 31 20 547 2390 New Zealand tel 0 800 738 378 fax 64 4 495 8950 Japan tel 81 426 56 7832 fax 81 426 56 7840 Australia tel 1 800 629 485 fax 61 3 9210 5947 Asia Call Ce...

Page 114: ...115 7 Technical Characteristics The following topics are included in this chapter Technical Characteristics 116 General Characteristics 122...

Page 115: ...H2 Single ended and differential Modulation bandwidth 500 MHz per channel 1 GHz IQ bandwidth Resolution N8241A 15 bits N8242A 10 bits Output spectral purity CH1 and CH2 Harmonic Distortion 1 kHz to 50...

Page 116: ...uneable 100 MS s to 1 25 GS s External clock input power 15 to 5 dBm 0 dBm nominal Phase Noise Characteristics 1 kHz 95 dBc Hz 10 kHz 115 dBc Hz 100 kHz 138 dBc Hz 1 MHz 150 dBc Hz Noise Floor 150 dBc...

Page 117: ...to 16 384 total unique waveform segments can be combined with separate loop counts to form a sequence External triggers Front Panel Triggers 1 2 3 4 Number of inputs 4 SMB female front panel connector...

Page 118: ...of outputs 4 SMB female front panel connectors Marker polarity Negative positive Output type 3 3V CMOS with 30 ohm series termination Marker low level 100 mV nominal high impedance load Marker high le...

Page 119: ...output level 800 mVp p 50 ohm output impedance AC coupled Sync clock input level 100 mVp p into 50 ohms AC coupled Analog output Output connector SMA female Output impedance 50 ohms Analog output lev...

Page 120: ...7 121 Technical Characteristics Single Ended Active Mode1 0Vp p with 0 2Vp p Differential Active Mode N A Reconstruction filters 500 MHz and 250 MHz realized as 7 pole elliptical filters plus thru lin...

Page 121: ...on and End use those stresses include but are not limited to temperature humidity shock vibration altitude and power line conditions Test methods are aligned with IEC 60068 2 and levels are similar to...

Page 122: ...acility in concurrence with Agilent Technologies Inc commitment to quality Electrostatic Discharge Immunity IEC 61000 4 2 passes criterion C Testing according to IEC 61000 4 2 showed that the exposure...

Page 123: ...124 Chapter 7 Technical Characteristics Options N8241A 016 Waveform memory expansion to 16 MS per channel N8241A 300 Dynamic Sequencing N8241A 330 Direct Digital Synthesis DDS...

Page 124: ...ital predistortion 86 direct digital synthesis 98 block diagram 98 dynamic sequencing 94 aux port 94 block diagram 94 E external clock 69 F flow chart advanced sequencer 74 scenario and sequence play...

Page 125: ...timing 91 synchronizing two n8241 2a instruments 47 cabling 47 selecting master unit 49 selecting slave unit 49 synchronous playback 50 synchronous trigger theory 82 system requirements 24 hardware 24...

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