Keysight Technologies B1542A Pulsed IV Package, User Manual

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Keysight B1542A User’s Guide, Edition 10 4-3
Performing Measurement
Theory of Measurement
Theory of Measurement
Figure 4-1 shows the pulsed IV measurement circuit diagram.
SMU (source monitor unit) applies DC voltage to the drain terminal through bias-T
(bias network). And PGU (pulse generator) applies pulse voltage to the gate
terminal through divider. Then the oscilloscope monitors the gate pulse through the
divider. Also the oscilloscope monitors the drain pulse through the bias-T by using
the another monitor channel.
The 50

terminator must be connected as shown in Figure 4-1 to keep the
impedance matching of the instrument’s input/output terminals and to avoid the
reflection at the gate terminal.
Figure 4-1 Pulsed IV Measurement Circuit Diagram
Simplified measurement circuit is shown in Figure 4-2 .
Vpgu-out is the PGU output voltage (pulse top value). And VdSet is the SMU
output voltage. By applying VdSet and Vpgu-out to the MOSFET, the
oscilloscope’s drain voltage monitor channel will capture the voltage drop caused by
the shunt resistor Z (impedance of the drain voltage measurement path). And the
drain current Id can be given by the following formula. Where, VdInt is the peak
value of the negative pulse.
Id = (VdSet
-
VdInt) / Z
S
D
G
Sub
+
DC+RF
RF
DC
Divider
Oscilloscope
drain voltage
monitor channel
Gate pulse voltage
Drain voltage
Oscilloscope
gate voltage
monitor channel
Vd
v
Vg
Terminator
PGU
SMU
Bias-T
v
A