TS-5700
CI RCU IT D ES CR I PTION
14
•
Power Control Circuit
Power is controlled by changing the base voltage
(POC) of 02 of the differential amplifier consisting of
01 and 02. The POC is set by the adjustment value
from the microcomputer and output from IC6. As the
base voltage (POC) of 02 decreases, the emitter volt
age of 01 and 02 decreases. This activates ALC and
reduces the power even if the base voltage (VSF) of
01 is low.
•
SWR Protection Ci rcuit
When the reflected wave voltage (VSR) detected
by the final unit rises, the PRO voltage output from IC6
increases, and 06 turns on to reduce the voltage of
the line of the A LC time constant circuit. The drive
output decreases and the transmission power lowers.
The PRO voltage is set according to the VSR by using
the adjustment value from the microcomputer.
1)
TX-AGC
The DSP controls the input level until it starts
modulation. It is like AGC for the microphone ampli
fier. When the input level exceeds a certain level, the
amplifier gain decreases to keep the modulator input
level constant. This value is set to the ALC meter
ZONE MAX. + 2dB. In SSB, the ALC is suppressed to
ZONE MAX. + 2dB or less even if the MIC LEVE L is
maximized or if the input level increases.
In FM, the level is suppressed so that it does not
exceed the maximum occupation frequency band
width of about 4.4kHz.
MOD/ANO
Od B
-2 d B
-10d B
ALC ZONE MAX +2 d B
ALC START
MIC INPUT
Fig.
1 1
•
Standby Control Ti m i n g
Standby control timing is determined by using soft
ware for the main CPU in the control unit. The control
signals for the control unit are listed below. (See Fig
ure 12 for each timing chart.)
SS : Standby switch input signal. Active low.
KEY : Keying input signal from the keyer.
Active low.
TXC : Transmit output signal. Active high.
Same timing as TXB.
CKY : Output signal. Active high.
With the SS l i n e
I
I
I
I
AF OUTPUT
I
i----i
1
l
35m
S
RF POWER
t
By ful l break-i n
No.39 OFF
10m S
" LINEAR"
ON
25m S
TXC
I
I
I
I
CKY
I
By semi break-in
10m S
I
I
I
I
I
I
I
I
I
I
TXC
I
I
I
CKY
t
I
I
I
I
I
1 OmS
12-107m S
Fig.
12
Transm it/receive signal timing chart
