TK-280
24
Fig. 14 Decode
IC13
AF IC
IC2
BPF
IC4
AMP
IC11
LPF
IC16
DTMF
DECODE
DCK,SD,STD
LSD
IN
HSD
IN
IC19
CPU
IC22
IC13
XOUT
OSC1
PD
11
3
95
DT
,CK,CE
CIRCUIT DESCRIPTION
Fig. 13 Encode
SUM
SUM
IC7(1/2)
SUM
R166
R162
C176
C170
R136
1
LSD
OUT
HSD
OUT
IC19
CPU
O5
O2
O3
O6
I2
I1
I5
IC8
D/A (ADJ)
VCO
MD
A1
RX Audio
MIC IN
IC13
2
LPF
IC10
I6
I3
VCXO
X1
MB
AF
AMP
IC7 (2/2)
O1 BUFF
AMP
IC1
7-2. Decode
●
Low-speed data (QT,DQT)
The demodulated signal from the IF IC (IC12) is amplified
by IC4 (2/2) and passes through a low-pass filter (IC11) to
remove audio components. The signal is input to pin 95 of the
CPU.
The CPU digitizes this signal, performs processing such as
DC restoration, and decodes the signal.
●
High-speed data (DTMF)
The DTMF input signal from the IF IC (IC12) is amplified by
IC4 (2/2) and goes to IC16, the DTMF decoder. The decoded
information is then processed by the CPU. During transmission
and standby, the DTMF IC is set to the power down mode
when the PD terminal is High. When the line is busy, the PD
terminal becomes Low, the power down mode is canceled and
decoding is carried out.
●
High-speed data (2 tone, 5 tone)
The demodulated signal from the IF IC (IC12) is amplified
by IC4 (2/2) and passes through an audio processor (IC13)
and band-pass filter (IC2) to remove a low-speed data. The
CPU digitizes this signal, performs processing such as DC
restoration, and decodes the signal.
●
FFSK
The FFSK input signal from the IF IC is amplified by IC4
(1/ 2) and goes to pin 5 of IC13. The signal is demodulated by
FFSK demodulator in IC13. The demodulated data goes to
the CPU for processing.
7. Signalling Circuit
7-1. Encode
●
Low-speed data (QT,DQT)
Low-speed data is output from pin 1 of the CPU. The signal
passes through a low-pass CR filter, and goes to the summing
amplifier (IC7 1/2). The signal is mixed with the audio signal
and goes to the VCO (A1) and VCXO (X1) modulation input
after passing through the D/A converter (IC8) for BAL
adjustment.
●
High-speed data (5 tone, DTMF)
High-speed data (HSD) is output from pin 2 of the CPU.
The signal passes through a low-pass filter consisting of IC10,
and provides a TX HSD tone and a RX HSD tone. TX HSD
deviation making an adjustment by microprocessor is passed
through the D/A convertor (IC8) and then applied to the audio
processor (IC13).
The signal is mixed with the audio signal and goes to the
VCO and VCXO. The RX HSD tone is passed a summing
amplifier (IC7 2/2). The D/A converter (IC8) for audio control,
audio power amplifier and then to the speaker.
●
FFSK
ESN utilizes 1200bps FFSK signal. FFSK signal is output
from pin 6 of IC13. The signal passes through the D/A converter
(IC8) for the FFSK deviation adjustment. and is routed to the
VCO. When encoding FFSK, the microphone input signal is
muted.