Kenwood TH-K40A Service Manual Download Page 6

Page: 6 / 40

TH-K40A/K40E

CIRCUIT DESCRIPTION

Realign the transceiver after replacing the EEPROM.

6. Signaling Circuit

6-1. Encode

■

CTCSS/ DCS

The CTCSS and DCS signals are output from pin 49

(LSDO) of the MCU (IC401). The signal passes through a
low-pass CR fi lter. The signal is mixed with the audio signal
and goes to the VCO and TCXO (X1) modulation input after
signal processing in the DAC IC (IC300).

■

DTMF

The DTMF signal is output from pin 50 (HSDO) of the

MCU.

The signal passes through a low-pass CR fi lter. TX devia-

tion making an adjustment by MCU is applied to the DAC IC
(IC300). The signal is mixed with the audio signal and goes
to the VCO and TCXO.

6-2. Decode

■

CTCSS/DCS

The output signal from IF IC (IC200) enters the MCU

(IC401) through IC300. IC401 determines whether the
CTCSS or DCS matches the preset value, and controls the
SPMUT and the speaker output sounds according to the
squelch results.

Fig. 6 Encode

7. Power Supply

There are fi ve 5V power supplies for the MCU:
5M is always output while the power is on.
5C is a common 5V and is output when SAVE is not set

to ON.

5R is 5V for reception and output during reception.
5T is 5V for transmission and output during transmission.
5MS is 5V for the SP/MIC connector and the DAC IC

(IC300).

4. Frequency Synthesizer Circuit

4-1. Frequency Synthesizer

The frequency synthesizer consists of the TCXO (X1),

VCO, PLL IC (IC1) and buffer amplifi ers.

The TCXO generates 19.2MHz. The frequency stability is

5.0 ppm within the temperature range of –30 to +60°C.

The frequency tuning and modulation of the TCXO are

done to apply a voltage to pin 1 of the TCXO. The output of
the TCXO is applied to pin 1 of the PLL IC.

The VCO consists of 1VCO and covers a dual range of

the 400.00~469.995MHz and the 361.150~431.145MHz.
The VCO generates 361.150~431.145MHz for providing to
the fi rst local signal in receive.

The PLL IC consists of a prescaler, reference divider,

phase comparator, charge pump (The frequency step of the
PLL circuit is 5 or 6.25 kHz).

PLL data is output from DAT (pin 19), CLK (pin 18) and

PLDL (pin 20) of the MCU (IC401). The data are input to the
PLL IC when the channel is changed or when transmission
is changed to reception and vice versa. A PLL lock condition
is always monitored by the pin 22 (PLUL) of the MCU. When
the PLL is unlocked, the PLUL goes low.

Fig. 5 PLL block diagram

5. Control Circuit

The control consists of the MCU (IC401) and its peripher-

al circuits. It controls the TX-RX unit. IC401 mainly performs
the following;
1) Switching between transmission and reception by PTT

signal input.

2) Reading channel information, frequency, and program

data from the memory circuit.

3) Sending frequency program data to the PLL.
4) Controlling squelch on/off via the DC voltage from the

squelch circuit.

5) Controlling the audio mute circuit via the decode data in-

put.

6) Transmitting tone and encode data.
7) Sending display data to the LCD assembly.