KDC-MP6090R/MP7018/MP8017
13
CIRCUIT DESCRIPTION (MP3)
●
PCM output Interface
The decoded audio data are output in serial PCM format.
The interface consists of the following signals.
ADO
PCM Serial data Output
SCKT
PCM Serial Clock output
LRCLK
Left/right Channel selection Clock
The output samples preciision is selectable from 16 to 24
bits/word, by setting the output precision with PCMCONF
(16, 18, 20 and 24 bits mode) register. Data can be output
either with the most significant bit first (MS) or least signifi-
cant bit first (LS), selected by writing into a flag of the
PCM-CONF register.
Figure 5 gives a description of the several STA013 PCM
Output Formats.
The sample rates set decoded by STA013 is described
Table 1.
MPEG 1
MPEG 2
PMEG 2.5
48
24
12
44.1
22.05
11.025
32
16
8
●
STA013 Operation Mode
The STA013 can work in two different modes, called
Multimedia Mode and Broadast Mode.
In Multimedia Mode, STA013 decodes the incoming bit-
stream, acting as a master of the data communication from
the source to itself.
This control is done by a specific buffer management, con-
trolled by STA013 embedded software.
The data source, by monitorng the DATA_REQ line, send
to STA013 the input data, when the signal is high (default
configuration).
The communication is stopped when the DATA_REQ line
is low.
In this mode the fractional part of the PLL is disabled and
the audio clocks are generated at nominal rates. Fig. 9
describes the default DATA_REQ sigal behaviour.
Programming STA013 it is possible to invert the polarity of
the DATA_REQ line (register REQ_POL).
In Broadcast Mode, STA013 works receiving a bitstream
with the input speed regulated by the source. In this config-
uration the source has to guarantee that the bitrate is
equivalent to the nominal bitrate of the decoded stream.
To compensate the difference between the nominal and
the real sampling rates, the STA013 embedded software
controls the fractional PLL operation. Portable or Mobile
applications need normally to operate in Broadcast Mode.
In both modes the MPEG Synchronisation is automatic and
transparent to the user. To operate in Multimedia mode,
the STA013, pin nr. 8, SCR-INT must be connected to
VDD on the application board.
●
STA013 Decoding States
There are three different decoder states: Idle, Init, and
Decode. Commands to change the decoding states are
described in the STA013 I
2
C registers description.
• Idle Mode
I
n this mode the decoder is waiting for the RUN command.
This mode should be used to initialise the configuration regis-
ter of the device. The DAC connected to STA013 can be ini-
tialised during this mode (set MUTE to 1).
PLAY
MUTE
Clock State
PCM Output
X
0
Not Runnig
0
X
1
Runnig
0
Table 1 MPEG Sampling rates (kHz)
Fig. 5 PCM output Formats
Fig. 6
LRCKT
SDO
SDO
LRCKT
SDO
SDO
SDO
SDO
16 SCLK
Cycles
16 SCLK
Cycles
16 SCLK
Cycles
16 SCLK
Cycles
16 SCLK
Cycles
M
S
M
S
L
S
L
S
M
S
L
S
M
S
L
S
M
S
L
S
M
S
L
S
M
S
L
S
M
S
L
S
PCM_ORD=0
PCM_PREC=16bit mode
PCM_ORD=1
PCM_PREC=16bit mode
32 SCLK
Cycles
32 SCLK
Cycles
32 SCLK
Cycles
32 SCLK
Cycles
32 SCLK
Cycles
M
S
L
S
0
M
S
L
S
0
M
S
L
S
0
M
S
L
S
0
PCM_FORMAT=1
PCM_DIFF=1
M
S
L
S
0
M
S
L
S
0
M
S
L
S
0
M
S
L
S
0
PCM_FORMAT=0
PCM_DIFF=0
M
S
L
S
MSB
M
S
L
S
MSB
M
S
L
S
MSB
M
S
L
S
MSB
PCM_FORMAT=1
PCM_DIFF=0
M
S
L
S
0
0
M
S
L
S
0
0
M
S
L
S
0
0
M
S
L
S
0
0
PCM_FORMAT=0
PCM_DIFF=1
DATA
_
REQ
SOURCE SEND DATA TO STA013
SOURCE STOPS
TRANSMITTING DATA
SOURCE STOPS
TRANSMITTING DATA
