11
KDC-MP6090R/MP7018/MP8017
CIRCUIT DESCRIPTION (MP3)
■
Pin Connection
■
Pin Description
Pin No.
Pin Name
Type
Function
PAD Description
1
VDD_1
Supply Voltage
2
VSS_1
Ground
3
SDA
I/O
I
2
C Serial Data +Acknowledge
CMOS Input Pad Buffer
CMOS 4mA Output Drive
4
SCL
I
I
2
C Serial Clock
CMOS Input pad Buffer
5
SDI1
I
Receiver Serial Data
CMOS Input Pad Buffer
6
SCKR
I
Receiver Serial Clock
CMOS Input Pad Buffer
7
BIT_EN
I
Bit Enable
CMOS Input Pad Buffer with pull up
8
SRC_INT
I
Interrupt Line For S.R.Control
CMOS Input Pad Buffer
9
SDO
O
Transmitter Serial data (PCM Data)
CMOS 4mA Output Drive
10
SCKT
O
Transmitter Serial Clock
CMOS 4mA Output Drive
11
LRCKT
O
Transmitter Left/Right Clock
CMOS 4mA Output Drive
12
OCLK
I/O
Oversampling Clock for DAC
CMOS Input Pad Buffer
CMOS 4mA Output Drive
13
VSS_2
Ground
14
VDD_2
Supply Voltage
15
VSS_3
Ground
16
VDD_3
Supply Voltage
17
PVDD
PLL Power
18
PVSS
PLL Ground
19
FILT
O
PLL Filter Ext. Capacitor Conn.
20
XTO
O
Crystal output
CMOS 4mA Output Drive
21
XTI
I
Crystal Input (Clock Input)
Specific Level Input Pad
22
VSS_4
Ground
23
VDD_4
Supply Voltage
24
TESTEN
I
Test Enable
CMOS Input Pad Buffer with pull up
25
SCANEN
I
Scan Enable
CMOS Input Pad Buffer
26
RESET
I
System Reset
CMOS Input Pad Buffer with pull up
27
VSS_5
Ground
28
OUT_CLK/DATA_REQ
O
Buffered Output Clock/Data Request Signal
CMOS 4mA Output Drive
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD_1
VSS_1
SDA
SCL
SDI
SCKR
BIT EN
SRC_INT
SDO
SCKT
LRCKT
OCLK
VSS_2
VDD_2
OUT_CLK/DATA_REQ
VSS_5
RESET
SCANEN
TESTEN
VDD_4
VSS_4
XTI
XTO
FILT
PVSS
PVDD
VDD_3
VSS_3
Note :
SRC_INT signal is used by STA013 internal sofrware in Broadcast mode only; in Multimedia mode SRC_INT must be connected to VDD.
In Functional mode TESTEN must be connected to VDD, SCANEN to ground.
