20
Trigger Level
Positive-Slope Trigger Event
Occurs
Negative-Slope Trigger
Event Occurs
Analog
Signal
Figure 3-5: Analog Trigger Conditions
Trigger signal can be chosen from among CH0, CH1, CH2,CH3, CH4, CH5, CH6 and CH7
during use of an external analog trigger source. The trigger level can be set by software with
24-bit resolution, with characteristics as shown.
Trigger Level
Setting (Hex)
Trigger Voltage
(-10V to +10V Range)
Trigger Voltage
(-1V to +1V Range)
7FFFFF
9.99999881 V
0.999999881 V
7FFFFE
9.99999762 V
0.999999762 V
1
1.19 μV
0.119 μV
0
0V
0V
FFFFFF
-1.19 μV
-0.119 μV
800001
-9.99999881 V
-0.999999881 V
800000
-10 V
-1 V
Table 3-4: Preferred Characteristics for Analog Triggers
Trigger Export
The PCIe-69529 utilizes SSI Bus Number 5 to act as a System Synchronization Interface (SSI).
With the interconnected bus provided by SSI Bus, multiple modules are easily synched.
When configured as input the PCIe-69529 serves as a slave module and can accept trigger
signals from SSI Bus Number 5, asserted from other PCIe-69529 modules. When configured
as output, the PCIe-69529 serves as a master module and can output trigger signals to SSI
Bus Number 5.
3�4 Trigger Mode
Two trigger modes applied to trigger sources initiate different data acquisition timings when
a trigger event occurs, as applied to analog input and output functions.
Summary of Contents for PCIe-69529
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