JVC RX-DV31SL, Service Manual

Page: 51 / 66

(No.22023)1-51
31 VSSIO I/O pad ground
32, 33 MA O SDRAM address bus, reserved for pin compatibility with 64Mb SDRAM
34 VDD Core power =1.8V
35 CS0 O SDRAM primary bank chip select
36 VDDIO I/O pad power =3.3V
37 RAS O SDRAM command bit
38 CAS O SDRAM command bit
39 WE O SDRAM command bit
40 VSSIO I/O pad ground
41, 42 DQM O SDRAM data byte enables
43 MD I/O SDRAM data bus
44 VDDIO I/O pad power =3.3V
45, 46 MD I/O SDRAM data bus
47 VSS Core and Ring ground
48 MD I/O SDRAM data bus
49 VSSIO I/O pad ground
50-52 MD I/O SDRAM data bus
53 VDDIO I/O pad power =3.3
54, 55 MD I/O VSDRAM data bus
56 MD I/O SDRAM data bus
57 VSSIO I/O pad ground
58-61 MD I/O SDRAM data bus
62 VDDIO I/O pad power =3.3V
63, 64 MD I/O SDRAM data bus
65 DQM O SDRAM data byte enables
66 CS1 O SDRAM extension bank chip select
67 VSSIO I/O pad ground
68 SPDIF O S/PDIF digital audio output
69 VSS Core and Ring ground
70 AIN I Digital audio input for digital micro
71 AOUT3 O Serial audio output data to audio DAC for Lch and Rch for down-mixed stereo
72 AOUT2 O Serial audio output data to audio DAC for SLch and SRch
73 AOUT1 O Serial audio output data to audio DAC for Cch and LFEch
74 AOUT0 O Serial audio output data to audio DAC for Lch and Rch
75 VDDIO I/O pad power =3.3V
76 PCMCLK O Audio DAC PCM sampling click frequency, common clock for DACs and ADC
77 VDD Core power =1.8V
78 ACLK O Audio interface serial data clock, common clock for DACs and ADC
79 LRCLK O L/R channel clock, common clock for DACs and ADC
80 SRST O Active low RESET signal for peripheral reset
81 RSTP I RESET input pin form system
82 VSSIO I/O pad ground
83 RXD1 I UART1 serial data input from external serial devise
84 SSPIN1/BAUD1 I/O SSP1 data in or 16X clock for USART function in UART1
85 VSS Core and Ring ground
86 SSPOUT1/DTR1 I/O SSP1data out or UART1 data-terminal-ready signal
87 SSPCLK1/CTS1 I/O SSP1clock or UART1 clear-to-send signal
88 SSPCLK0/RTS1 I/O SSP0 clock or request-to-send function in UART1
89 VDD Core power =1.8V
90 SSPIN0/BAUD0 I/O SSP0 data in or 16X clock for USART function in UART0
91 VDDIO I/O pad power =3.3V
Pin No. Symbol I/O Function