JVC RX-7030VBK, Service Manual

Page: 19 / 95

(No.22058)1-19
19 NC I Input clock select 1 pin
20 ADIF I Input clock select 0 pin
21 CAD1 I Chip address pin
Used during the serial control mode.
22 CAD0 I Chip address pin
Used during the serial control mode.
23 LOUT3 O Lch #3 analog output pin
24 ROUT3 O Rch #3 analog output pin
25 LOUT2 O Lch #2 analog output pin
26 ROUT2 O Rch #2 analog output pin
27 LOUT1 O Lch #2 analog output pin
28 ROUT1 O Rch #1 analog output pin
29 LIN- I Lch analog negative Input Pin
30 LIN+ I Lch analog positive Input Pin
31 RIN- I Rch analog negative Input Pin
32 RIN+ I Rch analog positive Input Pin
33 DZF2 I Negative voltage reference Input pin, AVSS
34 VCOM O Common voltage output pin, AVDD/2
Large external capacitor around 2.2uF is used to reduce power-supply noise
35 VREFH I Positive voltage reference input pin, AVDD
36 AVDD - Analog power supply pin
37 AVSS - Analog ground pin
38 DZF1 I X'tal input pin
39 MCKI I External master clock input pin if XTS="L"
40 P/S I Parallel/Serial select pin
"L" : Serial control mode, "H" : Parallel control mode
41 CSN I Chip select pin in serial mode
42 CCLK I Control data clock pin in serial mode
43 CDTI I Control data input pin in serial mode
44 LOOP1 I Loop back mode pin in parallel mode
Enable all 3 DAC channels to be input from SDTII.
Pin No. Symbol I/O Function