(No.YA422)2-31
2-32(No.YA422)
cs21232002_0522_2/17_0.0
RA6014
RA6013
JW
IC6001
MI_OSDYM
MI_OSDYS
OSDB1
OSDB2
OSDB3
OSDB4
OSDB5
DD_OSDHS
DD_OSDVS
OSDG1
OSDG2
OSDG3
OSDG4
OSDG5
DV1_B1
OSDR1
OSDR2
OSDR3
OSDR4
OSDR5
R6005
R6006
TP-DCK
TP-DDI
TP-DDO
TP-DMS
TP-DRSTZ
R6001
DV1_B2
R6075
TP-TRCK
TP-TRD0
TP-TRD1
TP-TRD2
TP-TRD3
TP-TREND
R6002
R6003
R6004
RA6010
DV1_B3
D6001
MECA_SW
R6014
C6723
R6730
C6724
IC6724
R6732
R6731
VCC3D
TP-JW
TP-EVT
TP-DBINT
R6008
R6009
R6007
R6011
R6073
OSDCKO
R6074
R6076
R6012
R6013
RA6001
RA6011
DD_OSDCK
RA6002
R6733
RA6003
RA6004
RA6005
RST_EAD
DV1_B4
R6017
R6018
R6019
R6020
TEST0
C6001
R6022
R6021
TEXT_HD
TEXT_VD
R6023
DV1_B5
DV1_B6
DV1_B7
DV1_R0
DV1_R1
DV1_R2
DV1_R3
DV1_R4
DV1_R5
DV1_R6
DV1_R7
DV1_Y1
DV1_Y0
DV1_Y2
DV1_Y3
DV1_Y7
VD_DV1
HD_DV1
DV1_Y6
DV1_Y5
DV1_Y4
CLK_DV1
DV1_B0
RA6012
RA6015
IC6002
C6002
R6078
R6077
R6079
R6080
OSDCK1
RA6007
RA6008
RA6009
RA6006
CLK_DV2
DV2_RB0
DV2_RB1
DV2_RB2
DV2_RB3
DV2_RB4
DV2_RB5
DV2_RB6
DV2_RB7
DV2_Y0
DV2_Y1
DV2_Y2
DV2_Y3
DV2_Y4
DV2_Y5
DV2_Y6
DV2_Y7
HD_DV2
VD_DV2
CLK_DV1
DV1_B0
DV1_B1
DV1_B2
DV1_B3
DV1_B4
DV1_B5
DV1_B6
DV1_B7
DV1_R0
DV1_R1
DV1_R2
DV1_R3
DV1_R4
DV1_R5
DV1_R6
DV1_R7
DV1_Y0
DV1_Y1
DV1_Y2
DV1_Y3
DV1_Y4
DV1_Y5
DV1_Y6
DV1_Y7
HD_DV1
VD_DV1
JCC5060
NRZ0034-0R0W
DCK
DDI
DDO
DMS
DRSTZ
PSEL0
PSEL1
TRCCLK
TRCDATA0
TRCDATA1
TRCDATA2
TRCDATA3
TRCEND
TRST
XRST
SMC
TEN
TEST0
TEST1
TEST2
TEST3
TEST4
TMC1
TMC2
FD_MO
HD_MO
VD_MO
ASI0
ASI1
ASI2
ASI3
BSI0
BSI1
BSI2
BSI3
BSI4
BSI5
GCKI
GCKO
GHDI
GHDO
GSI0
GSI1
GSI2
GSI3
GSI4
GSI5
GVDO
RSI0
RSI1
RSI2
RSI3
RSI4
RSI5
NRZ0034-0R0W
EXCLKO
EXDIO0
EXDIO1
EXDIO10
EXDIO11
EXDIO12
EXDIO13
EXDIO14
EXDIO15
EXDIO2
EXDIO3
EXDIO4
EXDIO5
EXDIO6
EXDIO7
EXDIO8
EXDIO9
EXHDIO
EXVDIO
VSS
VDD
CD
OUT
S-80928CLNB-G-W
P30_INTPZ8
P31_INTPZ9_EVT
P32_INTPZ10_DB
NRZ0080-0R0X
NRZ0034-0R0W
CPU_ADVREFM
CPU_ADVREFP
SN74LVC1G08V-X
NRZ0080-0R0X
NRZ0080-0R0X
NRZ0034-0R0W
OPEN
OPEN
0
OPEN
0
0
0
OPEN
OPEN
0
0.0022
0
0.01
0
0
0
22
OPEN
OPEN
0
0
OPEN
OPEN
OPEN
OPEN
0
OPEN
OPEN
OPEN
0
0
0
0
OPEN
OPEN
OPEN
OPEN
OPEN
OPEN
0.1/16
OPEN
OPEN
OPEN
0
OPEN
DV2_Y6
DV2_Y7
DV2_RB1
DV2_RB2
DV2_RB3
DV2_RB4
DV2_RB5
DV2_RB6
DV2_RB7
DV2_Y0
DV2_Y1
DV2_Y2
DV2_Y3
DV2_Y4
DV2_Y5
OSDCKO
CLK_DV1
DV1_B0
DV1_B1
DV1_B2
DV1_B3
DV1_B4
DV1_B5
TEST0
VCC3D
GND
STB3.3V
DV1_B6
DV1_R3
GND
DV1_B7
DV1_R0
DV1_R1
GND
DV1_R2
STB3.3V
DV1_R4
GND
GND
RST_EAD
GND
GND
VCC3D
GND
DV1_R5
DV1_R6
DV1_R7
GND
DV1_Y0
DV1_Y1
DV1_Y2
DV1_Y3
DV1_Y4
DV1_Y5
DV1_Y6
DV1_Y7
GND
GND
GND
VCC3DCPU
GND
GND
VCC3D
GND
OSDCK1
DD_OSDCK
GND
GND
HD_DV1
VD_DV1
Monitor
External
extended
edge
SHEET10,18,
DIGITAL INPUT BLOCK
SHEET21,22
SHEET21,22
SHEET22
SHEET21,22
SHEET21,22
SHEET21,22
SHEET10
SHEET22
SHEET21
SHEET22
SHEET22
SHEET13,21,22
SHEET13,21,22
SHEET17
SHEET17
SHEET17,21,22
SHEET7
SHEET7,19,21,22
SUB CPU/
A-D CONVERT / YC SEP./
CHROMA DEMOD./
FORMAT CONVERT/
Enhancer / NR
DIGITAL PWB ASS'Y(6/16)
SFL0D351A-H2 [LT-Z40SX6]
SFL0D352A-H2 [LT-Z40SX6/A,LT-Z40SX6/S]
DIGITAL PWB CIRCUIT DIAGRAM (6/16) SHEET 12