JVC KD-LH310, Schematic Diagrams

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(No.49843)1-41
• Pin function
Pin No. Symbol I/O Function
1 to 8 A15 to A8 I Address input for memory address
9 A19 I Address input for memory address
10 NC - Non connection
11 WE# I Write enable
12 RP# I Reset
13 VCCW - Power supply for write/erase
14 WP# I Write protect
15 RY/BY# O Ready/Busy
16,17 A18,A17 I Address input for memory address
18 to 25 A7 to A0 I Address input for memory address
26 CE# I Chip enable
27 GND - Ground
28 OE# I Output enable
29 DQ0 I/O Data input/output
30 DQ8 I/O Data input/output
31 DQ1 I/O Data input/output
32 DQ9 I/O Data input/output
33 DQ2 I/O Data input/output
34 DQ10 I/O Data input/output
35 DQ3 I/O Data input/output
36 DQ11 I/O Data input/output
37 VCC - Power supply
38 DQ4 I/O Data input/output
39 DQ12 I/O Data input/output
40 DQ5 I/O Data input/output
41 DQ13 I/O Data input/output
42 DQ6 I/O Data input/output
43 DQ14 I/O Data input/output
44 DQ7 I/O Data input/output
45 DQ15 I/O Data input/output
A-1 I Address input for memory address
46 GND - Ground
47 BYTE# I Byte enable
48 A16 I Address input for memory address
Pin No. Symbol I/O Function