1-52 (No.49843)
4.24 TC94A20F-008 (IC652) : Audio digital processor with DAC and SRAM
• Pin layout & Block diagram
SRAM I/F
Po2/A5
Po3/A6
VDDT
Po4/A7
Po5/A8
Po6/A9
Po7
VSS
IRQ/REQ/A10R
VDDM(SRAM)
Fi0/ /OE
Fi1/ /CAS
VSSM(SRAM)
Pi0/io0
Pi1/io1
VSS
Po1/A4
Po0/A3
TXo
TESTP
VSSR
VRAR
Ro
VDAR
VDAL
Lo
VRAL
VSSL
VSS
ST
ANDBY
VDD
/LRCKiB/A2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Pi2/io2
Pi3/io3
Pi4/CLCK/io4
VDD
Pi5/DA
T
A/io5
TST
iN/SFSY/io6
Fi2/SBSY/io7
VSSP
PDo
VCoi
VDDP
CKi/CKo/Po6/SBOK
VDDX
Xi
Xo
VSSX
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Interrupt
Control
T
imer
Flag
General
Output Port
Address Calc.
2sets
X-Pointer
register
Y
-Pointer
register
C-Pointer
register
Bus
Switch
ERAM
2k word
CROM
4k word
*7
YRAM
4k word
XRAM
4k word
X-Bus
Y-
B
u
s
PRAM
256word
Program
Control
PROM
4k*3
=12kword
40bit
Instruction
Decoder
Microcom. I/F
Audio. I/F
round & limit
round & limit
MAC
ALU
A0
A1
A2
A3
MX
MY
MZ
AX
A
Y
register
X0 - X1 - X2
Y0 -
Y1 -
Y2
I-Bus
DAC
DAC
Timing
Generator
SubQ
I/F
VC0
General
Input Port
BCKiB/A1
SDi1/A0
LRCKiA
BCKiA
SDi0
LRCKo
BCKo
SDo
VDDT
MiACK/A11R
/MiCK/SCL
MiDiO/SDA
/MiLP/ /RAS
/MiCS/ /WE
MiMD
/RESET
DIT
1Mbit
SRAM
SRAM I/F
Summary of Contents for KD-LH310
Page 9: ...KD LH3101 M E M O ...
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