2-23(No.YF133)
IC4501
JCY0209-2
[PRE PROCESS]
TG_HD
ACHI9
V27_OUT
TG_VD
ACHI8
ACHI7
ACHI6
ACHI5
SCPU_SO
ACHI4
SCPU_SI
ACHI3
VDCPU
HDIRS
SCPU_SCK
ACHI2
FLDCPU
CAM_VD
OP_CS
ACHI1
ACHI0
CAM_CLK
CAM_IN
CAM_OUT
SCPU_SCK
SCPU_SO
SCPU_SI
EEPRM_CK
EEPRM_DI
EEPRM_DO
F/Z_RST
SDWP
SDWP
S_SHUT
ID_LAT
VDCPU
FLDCPU
SSGFLD
CLK27A
CLK27B
S_SHUT
AFE_RST
MCLKI
MCLKI
TG_HD
TG_VD
CAM_VD
HDIRS
TVSEL
TVSEL
EEPRM_CS
SCPU_CS
TG_CS
CAM_CLK
CAM_IN
CAM_OUT
F/Z_RST
OP_CS
IRIS_PS
CLK27A
CLK27B
CLK27_AT
ACHI9
ACHI8
ACHI7
ACHI6
ACHI5
ACHI4
ACHI3
ACHI2
ACHI1
ACHI0
CLK27_AT
EEPRM_CS
EEPRM_DI
EEPRM_CK
EEPRM_DO
SCPU_CS
IRIS_PS
V27_OUT
AFE_RST
ID_LAT
SSGFLD
G_RST
GA_SCK
GA_SDT
GA_CS
GA_SCK
GA_SDT
GA_CS
G_RST
TG_CS
C4528
0.1
C4534
0.1
R4579
100
ACHI8
R4571
VDCPU
ACHI1
C4533
0.1
R4510
MCLKI
R4514
TG_CS
R4569
CLK27B
CAM_OUT
R4558
470
R4544
OPEN
ACHI5
R4563 1.5k
SCPU_SI
IRIS_PS
IC4502
M95320-WDW6-X
[EEPROM]
8
VCC
7
XHOLD
6
SCK
5
SI
4 VSS
3 XWP
2 SO
1 XCS
ACHI9
ID_LAT
R4502
100
ACHI2
V27_OUT
R4503
470
R4508
470
R4551
L450
NQR0
R4554
ACHI6
TG_VD
CLK27A
CAM_CLK
C4527
0.1
C
0
R4580
10K
AFE_RST
C4529
4.7/6.3
C4503
0.01
C4501
0.1
R4511
R4513
C4532
0.1
R4515
1K
ACHI4
2
VDD
68
VDD
72
SCK0
3
SI0
4
SO0
73
SCK1
74
SI1
75
SO1
70
SCK2
130
SI2
129
SO2
7
HSCK
71
HSI
131
HSO
5
GND
6
GND
8
GND
133
OMT0
134
OMT1
135
VDCPU
186
FLDCPU
185
ENCFLD
76
3.3V_VDD
78
3.3V_GND
11
CLK27A
80
CLK27B
188
INH
137
INV
32
KO
162
CLR
10
AVDDP2
77
AGNDP2
7
PLLREF2
2
TMC2
36
TMC1
47
CTRI
110
ADHTEST
161
TVSEL
165
SYSSEL1
164
SYSSEL0
108
3.3V_GND
106
3.3V_VDD
109
3.3V_VDD
43
PLLSEL1
45
PLLI1
107
AGNDP1
44
AVDDP1
112
VDIRS
167
HDIRS
111
VDMDA
48
CLK4M5
49
CLK1M0
168
STROB
113
MSHUT2
50
MSHUT1
46
MCLKI
166
ID
213
OBCP
212
FLDAFE
211
VDAFE
214
HDAFE
51
VDD
114 3.3V_VDD
52 3.3V_GND
54 ACHI0
115 ACHI1
55 ACHI2
116 ACHI3
56 ACHI4
117 ACHI5
57 ACHI6
118 ACHI7
58 ACHI8
119 ACHI9
59 ACHI10
120 ACHI11
60 ACHI12
121 ACHI13
61 BCHI0
122 BCHI1
62 BCHI2
123 BCHI3
63 BCHI4
124 BCHI5
64 BCHI6
125 BCHI7
65 BCHI8
126 BCHI9
66 BCHI10
127 BCHI11
67 BCHI12
128 BCHI13
169 VDD
173 VDD
177 VDD
171 GND
175 GND
179 GND
182 GPIO0
132 GPIO1
184 GPIO2
170 GPIO3
216 GPIO4
215 GPIO5
172 GPIO6
219 GPIO7
217 GPIO8
218 GPIO9
183 GPIO10
220 GPIO11
221 GPIO12
222 GPIO13
176 GPIO14
174 GPIO15
180 PWMO0
181 PWMO1
223 PWMO2/TO0
224 PWMO3/TO1
178 PWMO4/TO2
69 3.3V_VDD
1
3.3V_GND
SCPU_SO
R4504
470
HDIRS
R4565
R4543
OPEN
ACHI7
FLDCPU
TG_HD
ACHI0
CAM_IN
S_SHUT
R4501
100
R4507
470
R4550
ACHI3
CAM_VD
SCPU_SCK
C
4.7
L4507
NQR0006-001X
OP_CS
R4542
R4581 330
R4583 330
R4582
330
EEPRM_CS
EEPRM_CK
EEPRM_DO
EEPRM_DI
R4556
100
LAMP_ON
F/Z_RST
SCPU_CS
G_RST
R4555
100
TVSEL
TL4536
SDWP
R4589
#
SSGFLD
TL4503
TL4533
R4586 OPEN
R4585
CLK27_AT
R4505
470
R4506
470
GA_CS
GA_SCK
GA_SDT
NTXD_OUT
NTXD_IN
TL4501
C4512
OPEN
#
100
10
100
1k
100
100
10
1k
0
Ω
0
Ω
47k
OPEN
EURO-PAL
R4589
ASIA-PAL
R4571
& NTSC
Exchange Parts
0R0
OPEN
SYMBOL
TO DSP
TO OP DRV
TO CDS/TG
TO CDS/TG,OP DRV
TO CDS/TG
TO SUB CPU
TO MAIN IF(CN111),
USB HOST
TO MAIN IF
TO SUB CPU
TO SUB CPU,GA
TO DSP
TO MPEG2
TO AUDIO
TO CPU,GA
TO GA
MAIN(P.PRCS) SCHEMATIC DIAGRAM
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
