A
1
2
3
4
5
B
C
D
GND
LCD_BL
REG_3.1V
C7612
R7614
R7619
IC7602
REG_8.5V
R7621
C7611
L7602
L7601
C7601
C7613
C7614
C7618
R7613
HDCVF
VDCVF
C7615
C7616
C7617
LCD_B
LCD_G
LCD_R
VIF_CLK
VIF_OUT
LCD_CS
REG_4.8V
R7625
L7604
TL7612
IC7603
C7623
R7602
R7603
C7629
C7627
R7620
C7625
C7626
C7624
C7608
C7607
R7609
R7608
C7609
C7610
R7622
R7601
C7603
C7602
L7603
VCC1
DSDOUT
NC
VREG
RIN
GIN
BIN
RESET
SYNC_IN
VSEP_TC
VDIN
HDIN
TEST1
TEST2
CLPIN
GNG1
/6.3
NJM2871BF29-X
/16
T
T
/6.3
T
/16
VDD1
RPD
VSS1
TEST4
TEST5
LOAD
DATA
SIGCENT
VCC2
FBR
ROUT
FBG
GOUT
GND2
T
/16
T
10
0
0
10
10
µ
10
µ
10
0.1
1
0.022
0
1
1
1
0
0.01
1
0.47
0.47
0
0
0.1
0.01
0
10k
1
6800p
10
µ
TO V I/O
TO V I/O
TO CN203
V I/O
TO CN203
TO CN203
ANALOG(LCD DRV)
2
0
ANALOG(LCD DRV) SCHEMATIC DIAGRAM
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked (
) is not used.
2-29