2-69
2-70
CTL[+]
CTL[-]
CTLAMPOUT
SB_GAIN
LSD
V.PULSE
TO
VIDEO/N. AUDIO
VIDEO_ENV
V.PULSE
X3301
TIMER CLOCK
(32kHz)
IC3301
(SYSTEM CONTROL MICROPROCESSOR)
LSB
LSD(LMC2)
LSC
TP4001
CTL.P
M
LSB
LSA
LSC
V.FF
6
3
1
65
64
X1
X2
X3302
MAIN SYSTEM
CLOCK
(10MHz)
69
67
OSC2(OUT)
OSC1(IN)
CFG
CAP.M_F/R
CAPPWM
LM_F/R/S(LMC1)
DFG
DRUMPWM
8
28
101
35
108
102
S_DET
SECAM_DET
SCAM_DET
C.SYNC
26
27
LSA
25
36
1 2
D_PG+
D_PG-
L1
L2
CAP.M_FG
CAP.M_F/R
LM_F/R/S
DRUM_PG/FG
DRUM_VCTL
WF1
PHOTO
SENSOR
PC3002
54
55
SP_FG
TU_FG
SDA
SCL
6
5
IC3303
(SERIAL MEMORY)
76
75
I2C_DATA2
I2C_CLK2
73
TU_V.MUTE[H]
N.REC_ST[H]
N.REC[H]
VIDEO_ENV
SECAM_DET
C.SYNC
CTL[-]
98
SB_GAIN(PWM)
MESECAM_DET
AL5V
REC_SAFETY
REC SAFETY SW
S3001
41
1
2
3
START_SENSOR
END_SENSOR
CTL_GAIN
24
Q4001
SW
J7201
SAT_CTL
Q7591
Q7592
SW
Q3007
SW
DRUM MOTOR
5 8
1 2
3 in 1 MDA
CAP MOTOR
5 7
M
4
9
10
11
1
12
CN3001
4
9
10
11
1
12
M
LOADING MOTOR
5 5
CAP.M_VCTL
MAIN (SYSCON)
0 3
CTL[+]
N.REC[H]
N.REC_ST[H]
I2C_DATA_AV2
S_DET[H]
D.FF
I2C_CLK_AV2
A.MUTE_VHS[H]
JS3001
9
10
11
12
ROTARY
ENCODER
WF2
PHOTO
SENSOR
PC3001
WF3
START
SENSOR
Q3302
14
END
SENSOR
Q3303
15
WF4
WF5
12
81
13
110
38
100
11
90
105
I2C_DATA_AV2
I2C_CLK_AV2
A.MUTE_VHS[H]
I2C_CLK_AV2
A.MUTE_VHS[H]
I2C_DATA_AV2
50
49
74
A.FF
H.REC_ST[L]
A.FF
H.REC_ST[H]
99
88
A.ENV/ND[L]
A.ENV/ND[L]
22
TO
FMA
TO
TUNER
34
SW2-2
37
SW1-2
I2C_DATA2
I2C_CLK2
TU_MUTE2
SW2-2
SW1-2
IC3001
(SYSTEM CONTROL MICROPROCESSOR)
SYSCON VHS
OSD_CS
TO
ON SCREEN
I2C_DATA2
I2C_CLK2
S.DATA_FRSYTS
S.CLK
SYNC_DET[H]
P.MUTE[L]
53
52
S.CLK
S.DATA_FRSYS
72
SYNC_DET[H]
51
OSD_CS
103
P_MUTE[L]
RST
IC3302
(RESET IC)
1
66
RES
80
VHS_DATA_ON
59
VDR_DATA_ON
46
S_DATA_FRVDR
47
S_DATA_TOVDR
48
S_CLK_SYS
80
VHS_DATA_ON
79
VDR_DATA_ON
46
S_DATA_FRVDR
47
S_DATA_TOVDR
48
S_CLK_SYS
X3001
TIMER CLOCK
(32kHz)
65
64
X1
X2
X3002
MAIN SYSTEM
CLOCK
(10MHz)
69
67
OSC2(OUT)
OSC1(IN)
RST
IC3002
(RESET IC)
1
66
RES
SDA
SCL
6
5
IC3004
(SERIAL MEMORY)
76
75
I2C_DATA1
I2C_CLK1
60
TU_I2C_CLK1
61
TU_I2C_DATA1
73
TU_MUTE1
95
SW2-1
94
SW1-1
21
RF_AGC
20
AFC
34
P50_OUT
31
P50_IN
CN7112
10
11
12
13
CN3102
3
2
1
Q3015 to Q3017
SW
Q3011 to Q3014
SW
TO
DISPLAY/SW
TO
OPE/JACK
LED5
LED6
LED8_1
LED7
BULE_LED
LED10
LED9
38
LED8_1
30
LED7
26
LED6
24
LED5
81
LED10
77
LED9
41
LED8_2
CN5311
5
TO SW REG.
FAN_CTL[H]
36
FAN_CTL
SYSCON VDR
CN3103
3
4
5
TO
JUNCTION
(VIDEO)
CN7102
6
7
8
12
13
25
93
A.MUTE_VDR[H]
AD_RST[L]
51
K_BUS_IN1
52
K_BUS_OUT1
54
K_BUS_REQ1
53
K_BUS_CLK1
55
E5_RESET[L]
72
P_MUTE[H]
KBUS_DATA_TOSYS
P.MUTE_VDR[H]
ADC_RESET[L]
A.MUTE_VDR[H]
SYS_RESET[L]
KBUS_CLK
KBUS_DATA_FRSYS
KBUS_REQ
RF_AGC
TU_I2C_DATA1
TU_I2C_CLK1
TU_MUTE1
SW2-1
SW1-1
AFC
I2C_DATA1
I2C_CLK1
I2C_CLK_AV1
I2C_DATA_AV1
SECAM[L]
AV1_YV_IN[H]
50
I2C_CLK_AV1
49
I2C_DATA_AV1
89
AV1_YC_IN[H]
18
SECAM[L]
63
A.MUTE[L]
90
VDR[H]
86
A_INPUT_SEL2
85
A_INPUT_SEL1
A.MUTE[L]
VDR[H]
A_INPUT_SEL2
A_INPUT_SEL1
TO
AUDIO I/O
CN3001-1
CAP.M_FG
CN3001-11
DRUM_PG/FG
TP4001
CTL.P
IC3301-1
IC3301-98
REC/PB 4.8Vp-p
1.0V/0.5msec/DIV
REC/PB 4.7Vp-p
1.0V/10msec/DIV
PB 4.0Vp-p
1.0V/5msec/DIV
REC 3.8Vp-p
1.0V/10msec/DIV
REC 5.0Vp-p
1.0V/0.2usec/DIV
WF2
WF1
WF3
WF4
WF5
SYSTEM CONTROL BLOCK DIAGRAM